Machine Learning-Based Error Recovery System for NAND Flash Memory with Process Variation

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dc.contributor.authorLee, Seonminko
dc.contributor.authorJee, Jeongjuko
dc.contributor.authorPark, Hyuncheolko
dc.date.accessioned2021-12-10T06:48:02Z-
dc.date.available2021-12-10T06:48:02Z-
dc.date.created2021-11-26-
dc.date.created2021-11-26-
dc.date.created2021-11-26-
dc.date.issued2021-10-22-
dc.identifier.citation12th International Conference on ICT Convergence (ICTC) - Beyond the Pandemic Era with ICT Convergence Innovation, pp.1537 - 1541-
dc.identifier.issn2162-1233-
dc.identifier.urihttp://hdl.handle.net/10203/290401-
dc.description.abstractThe storage capacity of NAND flash memory has been significantly improved with advanced scaling and multileveling technologies. However, due to decreased intervals between voltage windows, NAND flash memory systems become vulnerable to retention and program/erase (P/E) cycling errors. Moreover, significant process variation resulting from the fabrication process results in different reliabilities among flash blocks. In this paper, we propose a machine learning-based error recovery system for low-latency NAND flash memory. In the NAND flash controller, the retention time and process variation are inaccessible in general. Therefore, it is difficult for the controller to select an appropriate decoding mode, resulting in increased latency. To replace the inaccessible information, we utilize the on-cell ratio as alternative information. The proposed error recovery system selects an optimal decoding mode which ensures successful error recovery with the minimum average read latency. Through simulation, we show that the proposed system predicts an optimal decoding mode with high accuracy. Moreover, average read latency performance is significantly improved compared to other baselines.-
dc.languageEnglish-
dc.publisherIEEE-
dc.titleMachine Learning-Based Error Recovery System for NAND Flash Memory with Process Variation-
dc.typeConference-
dc.identifier.wosid000790235800380-
dc.identifier.scopusid2-s2.0-85122957232-
dc.type.rimsCONF-
dc.citation.beginningpage1537-
dc.citation.endingpage1541-
dc.citation.publicationname12th International Conference on ICT Convergence (ICTC) - Beyond the Pandemic Era with ICT Convergence Innovation-
dc.identifier.conferencecountryKO-
dc.identifier.conferencelocationRamada Plaza Hotel, Jeju-
dc.identifier.doi10.1109/ICTC52510.2021.9620949-
dc.contributor.localauthorPark, Hyuncheol-
dc.contributor.nonIdAuthorLee, Seonmin-
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