Memory system for interference compensation and operating method thereof간섭 보상을 위한 메모리 시스템 및 메모리 시스템의 동작 방법

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A memory system includes a memory device including a plurality of memory cells, and a controller configured to access the plurality of memory cells. The controller includes a data read block configured to read first data from one or more pages included in first memory cells, determine a target memory cell subject to a compensation based on the first data, and read second data from one or more pages of second memory cells adjacent to the target memory cell, and an equalizer configured to convert the second data into symbol interfering data, check a probability of the first data from a lookup table according to the symbol interfering data, and determine the compensation on the first data based on the probability.
Assignee
KAIST, SK Hynix Inc.
Country
US (United States)
Application Date
2020-04-14
Application Number
16848578
Registration Date
2021-10-26
Registration Number
11158386
URI
http://hdl.handle.net/10203/289480
Appears in Collection
EE-Patent(특허)
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