Fully Bottom-Up Waste-Free Growth of Ultrathin Silicon Wafer via Self-Releasing Seed Layer

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dc.contributor.authorHong, Ji-Eunko
dc.contributor.authorLee, Yonghwanko
dc.contributor.authorMo, Sung-Inko
dc.contributor.authorJeong, Hye-Seongko
dc.contributor.authorAn, Jeong-Hoko
dc.contributor.authorSong, Hee-eunko
dc.contributor.authorOh, Jihunko
dc.contributor.authorBang, Junhyeokko
dc.contributor.authorOh, Joon-Hoko
dc.contributor.authorKim, Ka-Hyunko
dc.date.accessioned2021-11-03T06:42:51Z-
dc.date.available2021-11-03T06:42:51Z-
dc.date.created2021-09-14-
dc.date.created2021-09-14-
dc.date.created2021-09-14-
dc.date.issued2021-10-
dc.identifier.citationADVANCED MATERIALS, v.33, no.41, pp.2103708-
dc.identifier.issn0935-9648-
dc.identifier.urihttp://hdl.handle.net/10203/288608-
dc.description.abstractThe fabrication of ultrathin silicon wafers at low cost is crucial for advancing silicon electronics toward stretchability and flexibility. However, conventional fabrication techniques are inefficient because they sacrifice a large amount of substrate material. Thus, advanced silicon electronics that have been realized in laboratories cannot move forward to commercialization. Here, a fully bottom-up technique for producing a self-releasing ultrathin silicon wafer without sacrificing any of the substrate is presented. The key to this approach is a self-organized nanogap on the substrate fabricated by plasma-assisted epitaxial growth (plasma-epi) and subsequent hydrogen annealing. The wafer thickness can be independently controlled during the bulk growth after the formation of plasma-epi seed layer. In addition, semiconductor devices are realized using the ultrathin silicon wafer. Given the high scalability of plasma-epi and its compatibility with conventional semiconductor process, the proposed bottom-up wafer fabrication process will open a new route to developing advanced silicon electronics.-
dc.languageEnglish-
dc.publisherWILEY-V C H VERLAG GMBH-
dc.titleFully Bottom-Up Waste-Free Growth of Ultrathin Silicon Wafer via Self-Releasing Seed Layer-
dc.typeArticle-
dc.identifier.wosid000692067100001-
dc.identifier.scopusid2-s2.0-85114112119-
dc.type.rimsART-
dc.citation.volume33-
dc.citation.issue41-
dc.citation.beginningpage2103708-
dc.citation.publicationnameADVANCED MATERIALS-
dc.identifier.doi10.1002/adma.202103708-
dc.embargo.liftdate9999-12-31-
dc.embargo.terms9999-12-31-
dc.contributor.localauthorOh, Jihun-
dc.contributor.nonIdAuthorHong, Ji-Eun-
dc.contributor.nonIdAuthorMo, Sung-In-
dc.contributor.nonIdAuthorJeong, Hye-Seong-
dc.contributor.nonIdAuthorAn, Jeong-Ho-
dc.contributor.nonIdAuthorSong, Hee-eun-
dc.contributor.nonIdAuthorBang, Junhyeok-
dc.contributor.nonIdAuthorOh, Joon-Ho-
dc.contributor.nonIdAuthorKim, Ka-Hyun-
dc.description.isOpenAccessN-
dc.type.journalArticleArticle-
dc.subject.keywordAuthorepitaxial Si-
dc.subject.keywordAuthorkerfless wafer fabrication-
dc.subject.keywordAuthorself-releasing layer-
dc.subject.keywordAuthorsingle-batch reactor-
dc.subject.keywordAuthorultrathin Si-
dc.subject.keywordPlusSOLAR-CELLS-
dc.subject.keywordPlusDEGREES-C-
dc.subject.keywordPlusHYDROGEN-
dc.subject.keywordPlusVOIDS-
dc.subject.keywordPlusFILMS-
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