Semiconductor device having junctionless vertical gate transistor and method of manufacturing the same무접합 수직 게이트 트랜지스터를 갖는 반도체 소자 및

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A junctionless vertical gate transistor includes an active pillar vertically protruding from a substrate and including a first impurity region, a second impurity region and a third impurity region sequentially formed over the first impurity region; gate electrodes coupled to sidewalls of the second impurity region; and bit lines arranged in a direction of intersecting with the gate electrodes and each contacting the first impurity region. The first to the third impurity regions include impurities of the same polarity.
Assignee
KAIST, SK hynix Inc.
Country
US (United States)
Application Date
2019-04-29
Application Number
16398118
Registration Date
2021-01-12
Registration Number
10892262
URI
http://hdl.handle.net/10203/286936
Appears in Collection
RIMS Patents
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