Electrical Analysis for Wafer-Bonded Interfaces of p(+)GaAs/n(+)InGaAs and p(+)InGaAs/n(+)InGaAs

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We systematically investigated the wafer- bonded interfaces of p(+)GaAs/n(+)InGaAs and p(+)InGaAs/ n(+)InGaAs by using a circular transmission line method (CTLM) for the increased extraction accuracy. Based on the low-temperature bonding process at 50 degrees C, the bonded interfaces were successfully fabricated without degradation of the material quality. While the fabricated devices exhibited the linearly increased resistance as a function of channel distances, the p(+)InGaAs/n(+)InGaAs structure revealed the improved interfacial resistivity of 3.9 x 10(-3) Omega center dot cm(2) compared with 3.3x10(-2) Omega center dot cm(2) of the p(+)GaAs/n(+)InGaAs. Since these values suggested good electrical properties in wafer-bonded structures, the developed wafer-bonded interfaces could be a good approach for integrating electronic and optoelectronic devices.
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Issue Date
2021-06
Language
English
Article Type
Article
Citation

IEEE ELECTRON DEVICE LETTERS, v.42, no.6, pp.800 - 803

ISSN
0741-3106
DOI
10.1109/LED.2021.3076817
URI
http://hdl.handle.net/10203/285842
Appears in Collection
EE-Journal Papers(저널논문)
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