Owing to their high scalability and superior complementary metal-oxide-semiconductor (CMOS) compatibility, HfO2-based ferroelectric field-effect transistors (FeFETs) are proved to be promising candidates for emerging nonvolatile memory devices. However, the poor endurance of these FeFETs, which is attributed to the degradation of the interfacial dielectric layer, is a serious obstacle for commercialization. In FeFETs with a metal-ferroelectric-insulator-semiconductor gate stack, the strong electric field across the interfacial dielectric layer mainly induces charge injection/trapping and limits endurance to <10(6) cycles. Herein, optimum condition of switching polarization (Ps) of ferroelectric materials and a new structural approach to reduce the strength of the electric field across the interfacial dielectric layer and improve memory window (MW) and reliability properties are presented. Based on numerical simulation, it is found that an interfacial electric field increases with Ps, and a metal-ferroelectric-metal-insulator-semiconductor FeFET with a 3D channel structure is effective to have high ratio of dielectric capacitance to ferroelectric capacitance, resulting in low electric field through the interfacial layer and large MW.