This brief presents a low-power-consuming and low-phase-noise 10 GHz voltage-controlled oscillator (VCO) using the 65 nm CMOS technology. We propose a new structure for the VCO using a center-tap transformer and stacked transistor, which realizes negative gm-boosting to improve the phase noise and start-up conditions. The measured output frequency range of the designed VCO with a binary-weighted 3 bit capacitor bank is 9.66 to 11.07 GHz. The proposed VCO demonstrates a measured phase noise of -115.4 dBc/Hz at a 1 MHz offset frequency. To the best of our knowledge, compared to previously reported 10 GHz VCOs, the proposed circuit achieves the lowest phase noise. The proposed VCO achieves a power consumption of 2.7 mW, which reveals figure of merit and figure of merit with frequency tuning values as low as -191.4 and -194.1 dBc/Hz, respectively, and also the lowest value among state-of-the-art 10 GHz VCOs.