DC Field | Value | Language |
---|---|---|
dc.contributor.author | Lee, Ji-Hun | ko |
dc.contributor.author | Kang, Gyeong-Gu | ko |
dc.contributor.author | Ko, Min-Woo | ko |
dc.contributor.author | Cho, Gyu-Hyeong | ko |
dc.contributor.author | Kim, Hyun-Sik | ko |
dc.date.accessioned | 2020-07-02T01:20:53Z | - |
dc.date.available | 2020-07-02T01:20:53Z | - |
dc.date.created | 2020-06-17 | - |
dc.date.created | 2020-06-17 | - |
dc.date.created | 2020-06-17 | - |
dc.date.issued | 2020-06-16 | - |
dc.identifier.citation | 2020 IEEE Symposium on VLSI Circuits, VLSI Circuits 2020 | - |
dc.identifier.uri | http://hdl.handle.net/10203/275095 | - |
dc.description.abstract | In this paper, a Class-D audio amplifier (CDA) with bridge-tied load half-side switching (BTLHS) mode is presented. The BTLHS mode through a digital pulse width subtracter (DPWS) enables a low quiescent current (IQ) by suspending the output switching in idle condition while maintaining high linearity with seamless zero-crossings and mode change. The CDA achieves 0.0024% THD+N, IQ of 0.66mA, and 95% peak efficiency on an 8Ω-speaker. The chip was fabricated in a 0.18-μm CMOS process, and it occupies 0.83mm2. | - |
dc.language | English | - |
dc.publisher | IEEE | - |
dc.title | An 8Ω, 1.4W, 0.0024% THD+N Class-D Audio Amplifier with Bridge-Tied Load Half-Side Switching Mode Achieving Low Standby Quiescent Current of 660μA | - |
dc.type | Conference | - |
dc.identifier.wosid | 000621657500008 | - |
dc.identifier.scopusid | 2-s2.0-85090245095 | - |
dc.type.rims | CONF | - |
dc.citation.publicationname | 2020 IEEE Symposium on VLSI Circuits, VLSI Circuits 2020 | - |
dc.identifier.conferencecountry | US | - |
dc.identifier.conferencelocation | Virtual | - |
dc.identifier.doi | 10.1109/VLSICircuits18222.2020.9162781 | - |
dc.contributor.localauthor | Cho, Gyu-Hyeong | - |
dc.contributor.localauthor | Kim, Hyun-Sik | - |
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