153 FSRMS-Integrated-Jitter and 114-Multiplication Factor PVT-Robust 22.8 GHz Ring-LC-Hybrid Injection-Locked Clock Multiplier

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This work presents an ultra-low-jitter hybrid injection-locked clock multiplier (ILCM) that cascades a ring ILCM and an LC ILCM to achieve a high multiplication factor of 114. A dual-pur-pose frequency calibrator (DPFC) that can calibrate the frequency drifts of the two VCOs, concurrently, consumes only 400μ W. The RMS-jitter of the output signal at 22.8 GHz was 153 fs. Due to the DPFC, RMS-jitter was maintained to be less than 180 fs, across supply voltages and temperatures.
Publisher
Institute of Electrical and Electronics Engineers Inc.
Issue Date
2018-06-20
Language
English
Citation

32nd IEEE Symposium on VLSI Circuits, VLSI Circuits 2018, pp.185 - 186

DOI
10.1109/VLSIC.2018.8502355
URI
http://hdl.handle.net/10203/269574
Appears in Collection
EE-Conference Papers(학술회의논문)
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