A Second-Order Delta Sigma Time-to-Digital Converter Using Highly Digital Time-Domain Arithmetic Circuits
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Kim, Dongin | ko |
| dc.contributor.author | Kim, Kwangseok | ko |
| dc.contributor.author | Yu, Wonsik | ko |
| dc.contributor.author | Cho, Seonghwan | ko |
| dc.date.accessioned | 2019-11-01T00:20:11Z | - |
| dc.date.available | 2019-11-01T00:20:11Z | - |
| dc.date.created | 2019-10-31 | - |
| dc.date.issued | 2019-10 | - |
| dc.identifier.citation | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.66, no.10, pp.1643 - 1647 | - |
| dc.identifier.issn | 1549-7747 | - |
| dc.identifier.uri | http://hdl.handle.net/10203/268107 | - |
| dc.description.abstract | In this brief, time-domain arithmetic circuits, such as time adder, time subtractor, and time integrator, are proposed. The concept of these time-domain circuits are explained and their non-idealities are analyzed. Using the proposed time-domain arithmetic circuits, a prototype second-order Delta Sigma-time-to-digital converter is implemented in a 65 nm standard CMOS process. The fabricated chip achieves 1.44 ps(rms) of integrated noise in 1-MHz bandwidth while consuming 3.5 mW at 50 MS/s. | - |
| dc.language | English | - |
| dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
| dc.title | A Second-Order Delta Sigma Time-to-Digital Converter Using Highly Digital Time-Domain Arithmetic Circuits | - |
| dc.type | Article | - |
| dc.identifier.wosid | 000489738500009 | - |
| dc.identifier.scopusid | 2-s2.0-85072761632 | - |
| dc.type.rims | ART | - |
| dc.citation.volume | 66 | - |
| dc.citation.issue | 10 | - |
| dc.citation.beginningpage | 1643 | - |
| dc.citation.endingpage | 1647 | - |
| dc.citation.publicationname | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS | - |
| dc.identifier.doi | 10.1109/TCSII.2019.2925860 | - |
| dc.contributor.localauthor | Cho, Seonghwan | - |
| dc.contributor.nonIdAuthor | Kim, Kwangseok | - |
| dc.description.isOpenAccess | N | - |
| dc.type.journalArticle | Article; Proceedings Paper | - |
| dc.subject.keywordAuthor | Time-to-digital converter (TDC) | - |
| dc.subject.keywordAuthor | time-domain arithmetic circuits | - |
| dc.subject.keywordAuthor | time-register | - |
| dc.subject.keywordAuthor | time adder | - |
| dc.subject.keywordAuthor | time subtractor | - |
| dc.subject.keywordAuthor | time-integrator | - |
| dc.subject.keywordAuthor | Delta Sigma-TDC | - |
| dc.subject.keywordAuthor | PLL | - |
| dc.subject.keywordPlus | NM CMOS | - |
| dc.subject.keywordPlus | BIT | - |
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