Analysis and control of worst-case wafer delays in cluster tools with K-cyclic schedules

Abstract

This thesis deals with time delay issues in cluster tools. Cluster tools are single wafer processing equipment widely used in modern semiconductor fabrication facilities. A cluster tool that repeats a predetermined task sequence mostly operates in a K-cyclic schedule, where an identical timing pattern repeats for each K cycles. A K-cyclic schedule makes wafer delays, the residence time of a wafer within a chamber after the completion of the process, at each chamber repeat K different values. Such a variability of wafer delays increases the risk of quality failure. Therefore, we analyze and control the maximum wafer delay among all possible K-cyclic schedules called the worst-case wafer delay in this thesis. We first suggest closed-form formulae and optimization problems for characterizing worst-case wafer delays in dual-armed and single-armed cluster tools mostly used in modern fabs. We also experimentally analyze worst-case wafer delays in both tools. In addition, we suggest a method based on feedback control called Kanban feedback control for minimizing the worst-case wafer delay at a certain process step. Finally, we extend to the above results to propose a method to characterize the worst-case token delay in a general timed event graph.