Mechanical and Electrical Reliability Analysis of Flexible Si Complementary Metal-Oxide-Semiconductor Integrated Circuit

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dc.contributor.authorKim, Seungyoonko
dc.contributor.authorKim, Cheolgyuko
dc.contributor.authorBong, Jae Hoonko
dc.contributor.authorHwang, Wan Sikko
dc.contributor.authorKim, Taek-Sooko
dc.contributor.authorOh, Jae Subko
dc.contributor.authorCho, Byung Jinko
dc.date.accessioned2019-06-12T08:30:05Z-
dc.date.available2019-06-12T08:30:05Z-
dc.date.created2019-06-12-
dc.date.created2019-06-12-
dc.date.created2019-06-12-
dc.date.created2019-06-12-
dc.date.created2019-06-12-
dc.date.created2019-06-12-
dc.date.issued2019-10-
dc.identifier.citationJOURNAL OF NANOSCIENCE AND NANOTECHNOLOGY, v.19, no.10, pp.6473 - 6480-
dc.identifier.issn1533-4880-
dc.identifier.urihttp://hdl.handle.net/10203/262586-
dc.description.abstractA flexible Si complementary metal-oxide-semiconductor (CMOS) integrated circuit (IC) with multi-level interconnects is realized by thinning down and transferring the CMOS IC onto a polymer substrate. A detailed mechanical and electrical reliability analysis of the flexible Si CMOS IC is carried out in relation to the neutral mechanical plane (NMP) that is extracted from both analytical and numerical modeling. To enhance the reliability by optimizing the NMP position, the thicknesses of all the layers in the CMOS IC on the polymer substrate are carefully adjusted. The NMP-optimized flexible Si CMOS IC maintains its mechanical and electrical stability even at a 5-mm radius bending condition. In addition, to explore the degradation mechanism of the flexible Si CMOS IC, the change of the interface state density of the flexible Si CMOS at different bending conditions is investigated using the charge pumping method. Finally, the long-term electrical reliability of this flexible Si CMOS IC is also investigated.-
dc.languageEnglish-
dc.publisherAMERICAN SCIENTIFIC PUBLISHERS-
dc.titleMechanical and Electrical Reliability Analysis of Flexible Si Complementary Metal-Oxide-Semiconductor Integrated Circuit-
dc.typeArticle-
dc.identifier.wosid000466046800082-
dc.type.rimsART-
dc.citation.volume19-
dc.citation.issue10-
dc.citation.beginningpage6473-
dc.citation.endingpage6480-
dc.citation.publicationnameJOURNAL OF NANOSCIENCE AND NANOTECHNOLOGY-
dc.identifier.doi10.1166/jnn.2019.17066-
dc.contributor.localauthorKim, Taek-Soo-
dc.contributor.localauthorCho, Byung Jin-
dc.contributor.nonIdAuthorHwang, Wan Sik-
dc.contributor.nonIdAuthorOh, Jae Sub-
dc.description.isOpenAccessN-
dc.type.journalArticleArticle-
dc.subject.keywordAuthorFlexible Si Device-
dc.subject.keywordAuthorNeutral Mechanical Plane (NMP)-
dc.subject.keywordAuthorFlexible Electronics-
dc.subject.keywordAuthorCharge Pumping-
dc.subject.keywordAuthorNBTI-
dc.subject.keywordPlusSILICON-
dc.subject.keywordPlusTRANSISTORS-
Appears in Collection
ME-Journal Papers(저널논문)EE-Journal Papers(저널논문)
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