A Hybrid Structure Dual-Path Step-Down Converter With 96.2% Peak Efficiency Using 250-m Omega Large-DCR Inductor

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dc.contributor.authorHuh, Yeunheeko
dc.contributor.authorHong, Sung-Wanko
dc.contributor.authorCho, Gyu-Hyeongko
dc.date.accessioned2019-04-18T01:10:03Z-
dc.date.available2019-04-18T01:10:03Z-
dc.date.created2019-04-16-
dc.date.issued2019-04-
dc.identifier.citationIEEE JOURNAL OF SOLID-STATE CIRCUITS, v.54, no.4, pp.959 - 967-
dc.identifier.issn0018-9200-
dc.identifier.urihttp://hdl.handle.net/10203/261001-
dc.description.abstractA dual-path step-down converter (DPDC) is presented for achieving high power efficiency in the mobile power management ICs (PMICs). Adopting a hybrid structure using one inductor and one flying capacitor, the proposed DPDC supplies a load current via two parallel paths, relieved an intrinsic problem of the conventional buck converter (CBC) topology, which is a significant power loss from a large DCR of the inductor (R-DCR). Therefore, DPDC achieves a high power efficiency and thus also reduces the heating problem, which is another critical issue in the mobile set. Moreover, DPDC can shrink the volume of the PMIC set with a low manufacturing cost by alleviating an R-DCR specification of the inductor. In this paper, although a 250 m Omega of large R-DCR inductor is used for our measurements, a 96.2% of peak efficiency was achieved and the power loss of total parasitic resistances can be reduced to up to 30% of that of CBC. Moreover, according to our measurement plots, it is verified that DPDC achieves the efficiency notably higher not only in a wide load current (I-LOAD) range but also in a wide conversion ratio (V-OUT/V-IN) range, compared to CBC.-
dc.languageEnglish-
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC-
dc.titleA Hybrid Structure Dual-Path Step-Down Converter With 96.2% Peak Efficiency Using 250-m Omega Large-DCR Inductor-
dc.typeArticle-
dc.identifier.wosid000463024200006-
dc.type.rimsART-
dc.citation.volume54-
dc.citation.issue4-
dc.citation.beginningpage959-
dc.citation.endingpage967-
dc.citation.publicationnameIEEE JOURNAL OF SOLID-STATE CIRCUITS-
dc.identifier.doi10.1109/JSSC.2018.2882526-
dc.contributor.localauthorCho, Gyu-Hyeong-
dc.contributor.nonIdAuthorHong, Sung-Wan-
dc.description.isOpenAccessN-
dc.type.journalArticleArticle; Proceedings Paper-
dc.subject.keywordAuthorBuck-
dc.subject.keywordAuthordc resistance (DCR)-
dc.subject.keywordAuthordc-dc converter-
dc.subject.keywordAuthordual-path-
dc.subject.keywordAuthorequivalent series resistance (ESR)-
dc.subject.keywordAuthorhybrid-
dc.subject.keywordAuthorparasitic resistance-
dc.subject.keywordAuthorstep-down-
dc.subject.keywordPlusFREQUENCY-
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