(An) energy-efficient analog SRAM for mixed-signal processing = 혼성 시그널 프로세싱을 위한 에너지 효율적인 아날로그 정적 메모리

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An energy-efficient analog SRAM (A-SRAM) is proposed to eliminate redundant analog-to-digital (A/D) and digital-to-analog (D/A) conversion in mixed-signal systems, such as neuromorphic chips and neural networks. D/A conversion is integrated into the SRAM readout by charge sharing of the proposed split bit-line (BL). Also, A/D conversion is integrated into the SRAM write operation with the successive approximation method in the proposed inout (IO) block. Also, a configurable SRAM bit-cell array is proposed to allocate the converted digital data without unfilled bit-cells. The multi-row access decoder selects multiple bit-cells in a single column and configures the bit-cell array by controlling the BL switches to split BLs. The proposed A-SRAM is implemented using 65 nm CMOS technology. It achieves 17.5 fJ/bit energy-efficiency and 21 Gbit/s throughput for the analog readout, which are 64% and 1.3× better than those of the conventional SRAM followed by a DAC. Also, the area is reduced by 91% compared to the conventional SRAM with ADC and DAC.
Advisors
Yoo, Hoi-Junresearcher유회준researcher
Description
한국과학기술원 :전기및전자공학부,
Publisher
한국과학기술원
Issue Date
2017
Identifier
325007
Language
eng
Description

학위논문(석사) - 한국과학기술원 : 전기및전자공학부, 2017.2,[iii, 22 p. :]

Keywords

Analog memory; SRAM; mixed-signal processing; ADC; DAC; 아날로그 메모리; 정적 메모리; 혼성 신호 프로세싱

URI
http://hdl.handle.net/10203/243312
Link
http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=675420&flag=dissertation
Appears in Collection
EE-Theses_Master(석사논문)
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