VARIABLE-PRECISION DISTRIBUTED ARITHMETIC MULTI-INPUT MULTI-OUTPUT EQUALIZER FOR POWER-AND-AREA-EFFICIENT OPTICAL DUAL-POLARIZATION QUADRATURE PHASE-SHIFT-KEYING SYSTEM

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A variable-precision distributed arithmetic (VPDA) multi-input multi-output (MIMO) equalizer is presented to reduce the size and dynamic power of 112 Gbps dual-polarization quadrature phase-shift-keying (DP-QPSK) coherent optical communication receivers. The VPDA MIMO equalizer compensates for channel dispersion as well as various non-idealities of a time-interleaved successive approximation register (SAR) based analog-to-digital converter (ADC) simultaneously by using a least mean square (LMS) algorithm. As a result, area-hungry analog domain calibration circuits are not required. In addition, the VPDA MIMO equalizer achieves 45 dynamic power reduction over conventional finite impulse response (FIR) to equalizers by utilizing the minimum required resolution for the equalization of each dispersed symbol.
Assignee
KAIST
Country
US (United States)
Issue Date
2015-05-19
Application Date
2013-01-11
Application Number
13740118
Registration Date
2015-05-19
Registration Number
09036689
URI
http://hdl.handle.net/10203/231510
Appears in Collection
EE-Patent(특허)
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