Semiconductor devices and its manufacture method with junctionless vertical gate transistor무를 구비하여 수직 게이트 트랜지스터의 반도체 장치 및 그 제조 방법을 맺는다

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A kind of junctionless vertical gate transistor, including:Active cylinder, the active cylinder from substrate transverse it is prominent, and including the first impurity range, in second impurity range being sequentially formed on of first impurity range and the 3rd impurity range;Gate electrode, the gate electrode is coupled to the side wall of second impurity range;And bit line, the bit line is arranged along the direction intersected with the gate electrode, and each is contacted with first impurity range.First impurity range, second impurity range, the 3rd impurity range include the impurity of identical polar.
Assignee
KAIST, SK Hynix Inc.
Country
CC (Cocos (Keeling) Islands)
Issue Date
2017-05-31
Application Date
2013-03-05
Application Number
201310070019.9
Registration Date
2017-05-31
Registration Number
103311249
URI
http://hdl.handle.net/10203/229883
Appears in Collection
EE-Patent(특허)
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