Investigation on the Hump Effect Utilizing the Capacitance Voltage Characteristics of a-InGaZnO Thin Film Transistor

Abstract

As well as a parallel shift, the hump effect is also found in the transfer curve of amorphous indium gallium zinc oxide thin film transistors (a-IGZO TFTs) after gate bias stress. The capacitance voltage (C-V) curve is also deformed from its initial shape after the stress. This study analyzes both the C-V and transfer curves based on the same gate voltage axis to investigate the mechanism driving the hump generation. The origin of the hump effect seems to have little relationship with the electron trapping in the gate insulator. It is deduced that an additional interface trap generation occurs at the a-IGZO interface during gate bias stress test, thereby explaining the origin of the hump effect.