(A) new resistance model for a schottky barrier diode in CMOS including n-well thickness effect = CMOS 쇼트키 배리어 다이오드를 위한 n-well 두께 효과를 포함한 저항 모델

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Schottky barrier diode(SBD) is a two-terminal device that can be used in very high frequency band, especially in terahertz region. CMOS technology is good in terms of high integrability and low cost. CMOS SBD can be a solution to approach to terahertz region with CMOS technology. In this thesis, an accurate analysis for CMOS SBDs is done. Especially, a new resistance model for CMOS SBDs is proposed. The proposed model includes the n-well thickness as a variable to explain the operational behavior of a planar SBD. The model is verified using the simulation methodology SILVACO. For verification of the analyzed model and the SILVACO simulation results, SBD patterns are fabricated using a $0.13$\mu m$ CMOS process. It is demonstrated that the model and simulation results are consistent with measurement results of fabricated SBD. The tendency series resistance, junction capacitance, and cutoff frequency for various anode size is also discussed from measurement result of fabricated SBD.
Advisors
Lee, Sang Gugresearcher이상국researcher
Description
한국과학기술원 :전기및전자공학과,
Publisher
한국과학기술원
Issue Date
2013
Identifier
325007
Language
eng
Description

학위논문(석사) - 한국과학기술원 : 전기및전자공학과, 2013.8 ,[vi, 26 p. :]

Keywords

CMOS; capacitance; cut-off frequency; n-well thickness; resistance; Schottky barrier diodes; 씨모스; 저항; 차단주파수; 쇼트키 배리어 다이오드; n-well 두께

URI
http://hdl.handle.net/10203/221779
Link
http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=657350&flag=dissertation
Appears in Collection
EE-Theses_Master(석사논문)
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