DC Field | Value | Language |
---|---|---|
dc.contributor.author | Kim, Changhyeon | ko |
dc.contributor.author | Bong, Kyeongryeol | ko |
dc.contributor.author | Choi, Sungpill | ko |
dc.contributor.author | Lee, Kyuho Jason | ko |
dc.contributor.author | Yoo, Hoi-Jun | ko |
dc.date.accessioned | 2017-01-18T02:36:54Z | - |
dc.date.available | 2017-01-18T02:36:54Z | - |
dc.date.created | 2017-01-02 | - |
dc.date.created | 2017-01-02 | - |
dc.date.issued | 2016-12 | - |
dc.identifier.citation | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v.63, no.12, pp.2180 - 2188 | - |
dc.identifier.issn | 1549-8328 | - |
dc.identifier.uri | http://hdl.handle.net/10203/219613 | - |
dc.description.abstract | A low-latency and low-power stereo matching accelerator is monolithically integrated with a CMOS image sensor (CIS) for mobile applications. To reduce the overall latency, focal-plane processing is adopted by using the proposed analog census transform circuit (ACTC), and the image readout is pipelined with the following stereo matching process. In addition, a novel focal-plane rectification pixel array (FRPA) merges the rectification with the image readout without any additional processing latency. For area-efficient pixel design, sparse rectification is proposed, and the image rectification is implemented with only two additional switches in each pixel. A stereo matching digital processor (SMDP) is integrated with the CIS for cost aggregation. We present the full design including the layout with a 65 nm CMOS process, and the FRPA, the ACTC, and the SMDP achieve 11.0 ms latency with complete stereo matching stages, which is suitable for a smooth user interface. As a result, the 2-chip stereo matching system dissipates 573.9 mu J/frame and achieves 17% energy reduction compared to a previous stereo matching SoC. | - |
dc.language | English | - |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
dc.title | A CMOS Image Sensor-Based Stereo Matching Accelerator With Focal-Plane Sparse Rectification and Analog Census Transform | - |
dc.type | Article | - |
dc.identifier.wosid | 000389338300009 | - |
dc.identifier.scopusid | 2-s2.0-84996939134 | - |
dc.type.rims | ART | - |
dc.citation.volume | 63 | - |
dc.citation.issue | 12 | - |
dc.citation.beginningpage | 2180 | - |
dc.citation.endingpage | 2188 | - |
dc.citation.publicationname | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS | - |
dc.identifier.doi | 10.1109/TCSI.2016.2619718 | - |
dc.contributor.localauthor | Yoo, Hoi-Jun | - |
dc.description.isOpenAccess | N | - |
dc.type.journalArticle | Article; Proceedings Paper | - |
dc.subject.keywordAuthor | CMOS image sensor | - |
dc.subject.keywordAuthor | rectification | - |
dc.subject.keywordAuthor | stereo vision | - |
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