An 20-Gb/s W-Band OOK CMOS Receiver for High-Speed Wireless Interconnect

Abstract

This letter presents a high-speed and low-power consuming on-off keying (OOK) receiver implemented on 65-nm Si-CMOS process. The receiver uses OOK modulation for the low-power consumption and operates at a high-data rate due to wide-bandwidth circuitry. The receiver consists of a wide-band low-noise amplifier (LNA), a gain-boosting detector and a third-order active feedback amplifier. The receiver consumes 46 mW at 1 V supply and occupies 0.64 mm(2) including all pads. The receiver achieves 20 Gb/s at a bit-error rate (BER) less than 10(-11) for 2(7)-1 pseudorandom binary sequence (PRBS). The sensitivity is -29 dBm at 20 Gb/s data rate, and the energy per bit exhibits 2.3 pJ/bit. To the best of our knowledge, this receiver achieves the highest data rate at the single carrier modulation and the lowest energy per bit among the previously published millimeter-wave Si-CMOS OOK receivers