KAIST Approach for Submicron Device Modeling

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dc.contributor.authorLee, Kwyro-
dc.date.accessioned2011-01-04T07:25:23Z-
dc.date.available2011-01-04T07:25:23Z-
dc.date.created2012-02-06-
dc.date.issued1991-10-
dc.identifier.citationTechnical digest of International Conference on VLSI and CAD, v., no., pp.376 - 381-
dc.identifier.urihttp://hdl.handle.net/10203/21360-
dc.description.sponsorshipThe author wish to thank his coworkers all around the world, C. K. Park at KAIST, K. M. Rho at Hyundai, B. J. Moon at Vitesse, Y. Byun at Zerox, M. S. Shur at Univ. of Virginia, and T. A. Fjeldly at Norwegian Institute of Technology.en
dc.languageENG-
dc.language.isoen_USen
dc.publisherTechnical digest of International Conference on VLSI and CAD-
dc.titleKAIST Approach for Submicron Device Modeling-
dc.typeConference-
dc.type.rimsCONF-
dc.citation.beginningpage376-
dc.citation.endingpage381-
dc.citation.publicationnameTechnical digest of International Conference on VLSI and CAD-
dc.identifier.conferencecountrySouth Korea-
dc.identifier.conferencecountrySouth Korea-
dc.contributor.localauthorLee, Kwyro-

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