DC Field | Value | Language |
---|---|---|
dc.contributor.author | Kim, Young-Hwa | ko |
dc.contributor.author | Cho, SeongHwan | ko |
dc.date.accessioned | 2016-09-07T04:23:06Z | - |
dc.date.available | 2016-09-07T04:23:06Z | - |
dc.date.created | 2016-08-29 | - |
dc.date.created | 2016-08-29 | - |
dc.date.issued | 2016-07 | - |
dc.identifier.citation | IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, v.24, no.7, pp.2570 - 2579 | - |
dc.identifier.issn | 1063-8210 | - |
dc.identifier.uri | http://hdl.handle.net/10203/212871 | - |
dc.description.abstract | A zero-crossing-based circuit (ZCBC) is a promising technique for low-power high-resolution pipeline analog-to-digital converters (ADCs). Unfortunately, operating ZCBC ADCs at high speeds near 1 GS/s is quite challenging due to the delay of the zero-crossing detector that introduces nonlinear gain and offset errors. To solve nonlinearity, we propose a ZCBC pipeline ADC that employs a passive resistor as a current source. Due to its inherent linearity, the resistor-based ZCBC eliminates the input dependency of the interstage gain and offset errors, allowing a simple calibration. Furthermore, a background offset calibration scheme is proposed to cope with the large offset that results from high-speed operation. A prototype ADC implemented in 65-nm CMOS achieves an SNDR/SFDR of 47.26/62.64 dB at 1 GS/s while consuming 46.52 mW from 1 V supply | - |
dc.language | English | - |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
dc.title | A 1-GS/s 9-bit Zero-Crossing-Based Pipeline ADC Using a Resistor as a Current Source | - |
dc.type | Article | - |
dc.identifier.wosid | 000380031000014 | - |
dc.identifier.scopusid | 2-s2.0-84954553928 | - |
dc.type.rims | ART | - |
dc.citation.volume | 24 | - |
dc.citation.issue | 7 | - |
dc.citation.beginningpage | 2570 | - |
dc.citation.endingpage | 2579 | - |
dc.citation.publicationname | IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS | - |
dc.identifier.doi | 10.1109/TVLSI.2015.2508564 | - |
dc.contributor.localauthor | Cho, SeongHwan | - |
dc.description.isOpenAccess | N | - |
dc.type.journalArticle | Article | - |
dc.subject.keywordAuthor | Analog to digital | - |
dc.subject.keywordAuthor | analog-to-digital converter (ADC) | - |
dc.subject.keywordAuthor | calibration | - |
dc.subject.keywordAuthor | comparator-based switched capacitor | - |
dc.subject.keywordAuthor | gain calibration | - |
dc.subject.keywordAuthor | nonlinear calibration | - |
dc.subject.keywordAuthor | offset calibration | - |
dc.subject.keywordAuthor | pipeline | - |
dc.subject.keywordAuthor | zero-crossing based | - |
dc.subject.keywordAuthor | zero-crossing-based circuit (ZCBC) | - |
dc.subject.keywordPlus | BACKGROUND CALIBRATION | - |
dc.subject.keywordPlus | A/D CONVERTER | - |
dc.subject.keywordPlus | CMOS ADC | - |
dc.subject.keywordPlus | MS/S | - |
dc.subject.keywordPlus | VOLTAGE | - |
dc.subject.keywordPlus | STAGE | - |
dc.subject.keywordPlus | 15-B | - |
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