A Separate Extraction Method for Asymmetric Source and Drain Resistances Using Frequency-Dispersive C-V Characteristics in Exfoliated MoS2 FET

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Asymmetric source and drain (S/D) series resistances (R-S and R-D) are unavoidable in exfoliated MoS2 field-effect transistors (EM-FETs). Through combining the capacitance-voltage (C-V) and current-voltage characteristics, the asymmetric R-S and R-D values are extracted separately. First, the frequency-dispersive C-V characteristics are analyzed in a frequency range of 0.3-10 kHz. Second, the intrinsic R-S and R-D values (R-S,R- int and R-D,R- int) are characterized through deembedding the parasitic pad capacitances (C-Pad = C-S,C- Pad + C-D,C- Pad) between the S/D metal and the bottom gate (G) in an overlapped region with the consideration of the structure-dependent parameters in the EM-FET. The proposed methodology is verified through comparison with the well-known channel resistance method, which is based on only the ID-VD characteristics in the linear region. Finally, R-S,R- int and R-D,R- int at various parasitic overlap areas are extracted separately with improved accuracy.
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Issue Date
2016-02
Language
English
Article Type
Article
Citation

IEEE ELECTRON DEVICE LETTERS, v.37, no.2, pp.231 - 233

ISSN
0741-3106
DOI
10.1109/LED.2015.2509473
URI
http://hdl.handle.net/10203/208795
Appears in Collection
EE-Journal Papers(저널논문)
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