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Results 1-10 of 20 (Search time: 0.006 seconds).
| NO | Title, Author(s) (Publication Title, Volume Issue, Page, Issue Date) |
|---|---|
| Coupling-aware high-level interconnect synthesis for low power Lyuh C.-G.; Kim T.; Kim K.-W., IEEE/ACM International Conference on Computer Aided Design (ICCAD), pp.609 - 613, 2002-11-10 | |
| Optimal integration of inter-task and intra-task dynamic voltage scaling techniques for hard real-time applications Seo J.; Kim T.; Dutt N.D., ICCAD-2005: IEEE/ACM International Conference on Computer-Aided Design, 2005, v.2005, pp.449 - 454, 2005-11-06 | |
| Resource-constrained low-power bus encoding with crosstalk delay elimination Cha M.; Lyuh C.-G.; Kim T., Proceedings of the ASP - DAC 2004 Asia and South Pacific Design Automation Conference - 2004, pp.835 - 838, 2004-01-27 | |
| Address assignment combined with scheduling in DSP code generation Choi Y.; Kim T., 39th Annual Design Automation Conference, DAC'02, pp.225 - 230, 2002-06-10 | |
| Independent vector analysis: Definition and algorithms Kim T.; Lee I.; Lee T.-W., 40th Asilomar Conference on Signals, Systems, and Computers, ACSSC '06, pp.1393 - 1396, 2006-10-29 | |
| Address code generation utilizing memory sharing in DSP processors Kim T.; Hong S., 2005 IEEE International 48th Midwest Symposium on Circuits and Systems, MWSCAS 2005, v.2005, pp.579 - 582, 2005-08-07 | |
| Semi-automatic road extraction from IKONOS satellite image Yoon T.; Park W.; Kim T., Remote Sensing for Environmental Monitoring, GIS Applications, and Geology, v.4545, pp.320 - 328, 2001-09-18 | |
| Profile-based optimal intra-task voltage scheduling for hard real-time applications Seo J.; Kim T.; Chung K.-S., Proceedings of the 41st Design Automation Conference, pp.87 - 92, 2004-06-07 | |
| Memory access driven storage assignment for variables in embedded system design Choi Y.; Kim T., Proceedings of the ASP - DAC 2004 Asia and South Pacific Design Automation Conference - 2004, pp.478 - 481, 2004-01-27 | |
| Leakage power minimization for the synthesis of parallel multiplier circuits Shin K.; Kim T., Proceedings of the 2004 ACM Great lakes Symposium on VLSI, GLSVLSI 2004: VLSI in the Nanometer Era, pp.166 - 169, 2004-04-26 |