Browse "RIMS Conference Papers" by Title 

Showing results 41 to 60 of 3515

41
A 1-V 5 GHz low phase noise LC-VCO using voltage-dividing and bias-level shifting technique

Song T.; Yoon E., 2004 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems: Digest of Papers, pp.87 - 90, 2004-09-08

42
A 1.2-V 8-mW 2.4-GHz CMOS RF receiver IC for low power WPAN

Kwon I.; Song S.; Ko J., 2006 IEEE Sarnoff Symposium, 2006-03-27

43
A 1.8-GHz Self-calibrated Phase-locked Loop with Precise I/Q Matching

Beom-Sup Kim, AP-ASIC 2000 Proceedings of the Second IEEE Asia Pacific Conference on, pp.81 - 84, IEEE, 2000-08

44
A 13 bit 2.5 MHz Self-Calibrated Pipelined A/D Converter in 3um CMOS

Beom-Sup Kim, IEEE Symposium on VLSI CIrcuits, pp.33 - 34, 1990

45
A 13GHZ CMOS distributed oscillator using MEMS coupled transmission lines for low phase noise

Park E.-C.; Yoon E., Digest of Technical Papers - IEEE International Solid-State Circuits Conference: Visuals Supplement, v.47, pp.244 - 245, 2003-02-15

46
A 161mW 56Gb/s ADC-Based Discrete Multitone Wireline Receiver Data-Path in 14nm FinFET

Kim, Gain; Kull, Lukas; Luu, Danny; Braendli, Matthias; Menolfi, Christian; Francese, Pier-Andrea; Yueksel, Hazar; et al, IEEE International Solid- State Circuits Conference (ISSCC), pp.476 - +, IEEE, 2019-02

47
A 16b quadrature direct digital frequency synthesizer using interpolative angle rotation algorithm

Song Y.; Kim B., 2002 Symposium on VLSI Circuits Digest of Technical Papers, pp.146 - 147, IEEE, 2002-06-13

48
A 185fsrms-integrated-jitter and -245dB FOM PVT-robust ring-VCO-based injection-locked clock multiplier with a continuous frequency-tracking loop using a replica-delay cell and a dual-edge phase detector

Choi, Seojin; Yoo, Seyeon; Choi, Jaehyouk, 63rd IEEE International Solid-State Circuits Conference, ISSCC 2016, pp.194 - 195, Institute of Electrical and Electronics Engineers Inc., 2016-02-15

49
A 1x1, 512x512 poly-Si TFT-LCD with Integrated 8-bit Parallel-Serial Digital Data Drivers

Chul-Hi Han, IDMC 2000, pp.115 - 118, 2000

50
A 2.4-GHz CMOS LNA with harmonic cancellation and current reuse technique

Kwon I.; Gil J.; Lee K.; 신형철, 제9회 반도체학술대회, pp.251 - 254, 제9회 반도체학술대회, 2002-02

51
A 2.4-GHz Fully Integrated CMOS Quadrature VCO

Hyung-Cheol Shin, Asia Pacific-System on a Chip 2002, pp.207 - 210, 2002

52
A 2.4-GHz Fully Integrated CMOS Quadrature VCO

신형철, IDEC Conference 2002-Summer, pp.31 - 34, 2002

53
A 2.6GHz Low Phase-Noise VCO Monolithically Integrated with High Q MEMS Inductors

Euisik Yoon, European Solid-State Circuits Conference, pp.143 - 146, 2002

54
A 200 x 160 pixel CMOS fingerprint recognition SoC with adaptable column-parallel processors

Kim S.-J.; Lee K.-H.; Han S.-W.; Yoon E., 2005 IEEE International Solid-State Circuits Conference, ISSCC, v.48, pp.250 -, 2005-02-06

55
A 230MHz 8 Tap Programmable FIR Filter Using Redundant Binary Number System

Euisik Yoon, IEEE ISCAS, IEEE, 1999-05

56
A 250MHz direct digital frequency synthesizer with ΣΔ noise shaping

Song Y.; Kim B., 2003 Digest of Technical Papers, 2003-02-09

57
A 250MHz Low Jitter Adaptive Bandwidth PLL

Beom-Sup Kim, IEEE International Solid-State Circuit Conferece, 1999

58
A 2GHz 16dBm IIP3 low noise amplifier in 0.25um CMOS technology

Youn Y.-S.; Chang J.-H.; Koh K.-J.; Lee Y.-J.; Yu H.-K., 2003 Digest of Technical Papers, 2003-02-09

59
A 3-mW, -119.2dBc/Hz@1MHz, 2.6-GHz, CMOS quadrature VCO using helical inductors as a noise filter

신형철, 제10회 반도체학술대회, 제10회 반도체학술대회, 2003-02

60
A 300mW programmable QAM transceiver for VDSL applications

Nam, H.; Kim, T.H.; Ryu, C.H.; Kim, M.G.; Kim, H.J.; Song, Y.; Shim, J.H.; et al, IEEE International Solid-State Circuits Conference, pp.418 - 504, IEEE, 2003-02-10

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