Browse "RIMS Conference Papers" byAuthor1096

Showing results 1 to 60 of 75

1
25nm Bulk MOSFET with Floating Gate Spacer

Hyung-Cheol Shinresearcher, Silicon Nanoelectronics Workshop, pp.12 - 13, 2000

2
45 nm baised spacer MOSFET

Hyung-Cheol Shinresearcher, Silicon Nanoelectronics Workshop, pp.126 - 127, 2003

3
50 nm MOSFET with Floating Polysilicon Spacer

Hyung-Cheol Shinresearcher, IEEE Silicon Nanoelectronics Workshop, pp.54 - 55, 2001

4
50 nm MOSFET with High-k Dielectric Sidewall

Hyung-Cheol Shinresearcher, IEEE Silicon Nanoelectronics Workshop, pp.70 - 71, 2001

5
A 2.4-GHz Fully Integrated CMOS Quadrature VCO

Hyung-Cheol Shinresearcher, Asia Pacific-System on a Chip 2002, pp.207 - 210, 2002

6
A 2.4-GHz Fully Integrated CMOS Quadrature VCO

신형철researcher, IDEC Conference 2002-Summer, pp.31 - 34, 2002

7
A 5-GHz Band I/Q Generator using a Self-Calibration Technique

Beom-Sup Kimresearcher; Hyung-Cheol Shinresearcher, European Solid-State Circuit Conference, pp.807 - 810, 2002

8
A direct method to extract the substrate resistance components of RF MOSFETs valid up to 50 GHz

Kim S.; Han J.; Shin H.researcher, 2004 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems: Digest of Papers, pp.235 - 238, 2004-09-08

9
A Model of Thin Oxide Damage by Plasma Etching and Ashing Processes

Hyung-Cheol Shinresearcher, Plasma Etch, pp.27 - 29, 1991

10
A nano-structure Memory with SOI Edge channel and A nano dot

Hyung-Cheol Shinresearcher, MNC(Microproceses and Nanotechnology Conference), pp.315 - 316, 1998

11
A New Curvature-Compensated CMOS Bandgap Reference with Low Power Consumption

Hyung-Cheol Shinresearcher, ITC-CSCC 2000, pp.612 - 614, 2000

12
A New Quantum Dot Formation Process Using Wet Etching of Poly-Si Alog Grain Boundaries

Hyung-Cheol Shinresearcher, MNC2000, pp.248 - 249, 2000

13
A new RF model for the accumulation-mode MOS varactor

Song S.-S.; Shin H.researcher, 2003 IEEE MTT-S International Microwave Symposium Digest, v.2, pp.1023 - 1026, 2003-06-08

14
A New SOI Inverter using Active Body-Bias

Hyung-Cheol Shinresearcher, ITC-CSCC, pp.1457 - 1459, 1998

15
A Nonvolatile Memory Using Nanocrystals Formed by Wet Etching

Hyung-Cheol Shinresearcher, ICSMM 2000, pp.124 - 125, 2000

16
A scalable model for the substrate resistance in multi-finger RF MOSFETs

Han J.; Shin H.researcher, 2003 IEEE MTT-S International Microwave Symposium Digest, v.3, pp.2105 - 2108, 2003-06-08

17
A self-assembled silicon quantum dot transistor operation at room temperature

Hyung-Cheol Shinresearcher, 1998 ASIAN SCIENCE SEMINAR, 1998

18
A self-assembled silicon quantum dot transistor operation at room temperature

Hyung-Cheol Shinresearcher, NPMS'98, 1998

19
A self-assembled silicon quantum dot transistor operation at room temperature

Hyung-Cheol Shinresearcher, Sound Quality Symposium Conference(SQS), 1998

20
A Simple Technique to Measure Generation Lifetime in Partially Depleted SOI MOSFETS

Hyung-Cheol Shinresearcher, 5th International Conference on VLSI and CAD, pp.55 - 59, 1997

21
A Simple Wide-Band MIM Capacitor Model for RF Applications and the Effect of Substrate Grounded Shields

Hyung-Cheol Shinresearcher, 2003 International Conference on Solid State Devices and Materials (SSDM 2003), 2003

22
A Tri-Gate MOSFET with Gate-to-Source/Drain Non-overlapped Structure for 5 nm Regime

Hyung-Cheol Shinresearcher, Silicon Nanoelectronics Workshop 2003, pp.32 - 33, 2003

23
Accurate Four-Terminal RF MOSFET Model Accounting for the Short-Channel Effect in the Source-to-Drain Capacitance

Hyung-Cheol Shinresearcher, SISPAD 2003, 2003

24
Characteristics of p-channel Si nano-crystal memory

Han K.; Kim I.; Shin H.researcher, 2000 IEEE International Electron Devices Meeting, pp.309 - 312, 2000-12-10

25
Characteristics of P-channel Si Nano-crystal Memory

Hyung-Cheol Shinresearcher, IEEE Region 10 Ionference, TENCON, pp.1140 - 1142, 1999

26
Characteristics of P-channel Si Nano-crystal Memory with Tunneling Oxide

Hyung-Cheol Shinresearcher, 99 ISDRS, pp.73 - 75, 1999

27
Characteristics of Thermal Nitride Grown by IR Furnace

Hyung-Cheol Shinresearcher, IUMRS-ICEM-98, pp.106 - 106, 1998

28
Characterization of oxide Charging in a Magnetically Enhanced Rie Polysilicon Etcher

Hyung-Cheol Shinresearcher, Proc. 11th International Syposium on Plasma Chemistry, pp.1534 - 1539, 1993

29
Characterization of Process-Induced Damage During Aluminum Etching and Photoresist Ashing

Hyung-Cheol Shinresearcher, International Wafer Level Reliability Workshop, pp.133 - 144, 1991

30
Characterization of Thin Oxide Damage During Aluminum Etching and Photoresist Ashing Processes

Hyung-Cheol Shinresearcher, International Symposium on VLSI Technology,Systems and Applications, pp.210 - 213, 1991

31
Comparative Study of the De-embedding Methods for RF device

신형철researcher, Agilent EEsof User Workshop, pp.55 - 57, 2002

32
Comparison of the characteristics of tunneling oxide and tunneling ON for P-channel Nano-crystal Memory

Hyung-Cheol Shinresearcher, The 6th International Conference on VLSI and Cad(ICVC'99), pp.233 - 236, 1999

33
DC and AC Characteristics of 10 nm T-Gate MOSFETs with Source/Drain-to-gate Non-Overlapped Structure

Hyung-Cheol Shinresearcher, Silicon Nanoelectronics Workshop 2003, pp.24 - 25, 2003

34
Device Characteristics of 25 nm MOSFET with Floating Side Gates

Hyung-Cheol Shinresearcher, ICSMM 2000, pp.118 - 119, 2000

35
Effect of Body Structure on Analog Performance of SOI NMOSFET's

Hyung-Cheol Shinresearcher, IEEE SOI Conference, pp.61 - 62, 1998

36
Effects of S/D Non-Overlap and High-k Dielectrics on Nano CMOS Design

Hyung-Cheol Shinresearcher, ISDRS, pp.661 - 664, 2001

37
Extraction method for substrate resistance of RF MOSFETs

Han J.; Je M.; Shin H.researcher, Proceedings of The 2002 International Conference on Microelectronic Test Structures, pp.37 - 40, 2002-04-08

38
Fabrication and Characterization of a Quantum Dot Flash Memory

Hyung-Cheol Shinresearcher, 99 International Workshop on Advanced LSI's and Devices, pp.12 - 15, 1999

39
Fabrication of siliocon Quantum Dots on Oxide and Nitride

Hyung-Cheol Shinresearcher, MNC(Microproceses and Nanotechnology Conference), pp.136 - 137, 1998

40
Factors Affecting Charge-up in a Magnetically Enhanced RIE Polysilicon Etcher

Hyung-Cheol Shinresearcher, Proc. Electrochemical Society, pp.405 - 406, 1993

41
Gate Oxide Damage by Plasma Oxide Deposition and Via RIE

Hyung-Cheol Shinresearcher, American Vacuum Society Plasma Etch 1992 Symposium, 1992

42
High speed and low power SOI inverter using active body-bias

Gil Joonho; Je Minkyu; Lee Jongho; Shin Hyungcheolresearcher, Proceedings of the 1998 International Symposium on Low Power Electronics and Design, pp.59 - 63, 1998-08-10

43
Impact of Plasma Charging Damage and Diode Protection on Scaled Thin Oxide

Hyung-Cheol Shinresearcher, IEDM Technical Digest, pp.467 - 470, 1993

44
Improvement in HgCdTe diode characteristics by flip-chip bonded annealing

Bae, S.-H.; Kim, Y.-H.; Kim, K.; Lee, Hee Chulresearcher; Kim, Choong Ki; Shin, HCresearcher, Infrared Technology and Applications XXIII, v.3061, pp.104 - 110, 1997-04-20

45
Integrity of Gate Oxide on TFSOI Materials

Hyung-Cheol Shinresearcher, Proc. IEEE International SOI Conference, pp.22 - 23, 1995

46
Lateral Silicon Field Emission Devices using Electron Beam Lithography

Hyung-Cheol Shinresearcher, Micoroprocesses and Nanotechnology'99, pp.134 - 135, 1999

47
Materials, Device and Gate Oxide Integrith Evaluation of Simox and Bonded SOI Wafers

Hyung-Cheol Shinresearcher, Proc. IEEE International SOI Conference, pp.143 - 145, 1995

48
MOS Image Sensor Cell Suppressed Blooming

신형철researcher, Proc. of Conference of KITE, pp.308 - 311, 1987

49
MOS Memory Using Si Nanocrystals Formed by Wet Etching of Poly-Silicon Along Grain Boundaries

Hyung-Cheol Shinresearcher, 2000 Asia-Pacific Workshop on Fundamental and Application of Advanced Semiconductor Devices, pp.221 - 224, 2000

50
On the large-signal CMOS modeling and parameter extraction for RF applications

Hyung-Cheol Shinresearcher, SISPAD 2002, pp.67 - 70, 2002

51
Optimization of Spiral Inductors on Siliocon Substrate

신형철researcher, IDEC Conference 2002-Summer, pp.49 - 52, 2002

52
Optimization of Symmetric Spiral Inductors on Siliocon Substrate

신형철researcher, Agilent EEsof User Workshop, pp.58 - 62, 2002

53
P-channel Nano Crystal Memory

Hyung-Cheol Shinresearcher, 2000 China-Korea Joint Symposium on Semiconductor Physics and Device Application, pp.19 - 19, 2000

54
Physical modeling of substrate resistance in RF MOSFETs

Han J.; Je M.; Shin H.researcher, 2003 Nanotechnology Conference and Trade Show - Nanotech 2003, v.2, pp.290 - 293, 2003-02-23

55
Physical Modeling of Substrate Resistance in RF MOSFETs

Hyung-Cheol Shinresearcher, Workshop on Compact Modeling at the 5th International Conference on Modeling and Simulation of Microsystems, pp.335 - 338, 2003

56
Physical RF modeling of Junction Varactors

Hyung-Cheol Shinresearcher, SSDM 2002, pp.418 - 419, 2002

57
Plasma-Etching induced Damage to Thin Oxide

Hyung-Cheol Shinresearcher, IEEE/SEMI Advanced Semiconductor Manufacturing Conference, pp.79 - 83, 1992

58
PMOS-based Si Nano-crystal Memory

Hyung-Cheol Shinresearcher, Silicon nanoelectronics workshop, pp.10 - 11, 1999

59
Process-Induced Charging Damage in PETEOS for Interlevel Dielectric Applications

Hyung-Cheol Shinresearcher, International Symposium on Plasma Process-Induced Damage, pp.109 - 112, 1996

60
Programming and Erasing Characteristics of P-channel Nano-crystal Memory

Hyung-Cheol Shinresearcher, Semicon Korea Technical Symposium 2000, pp.5 - 10, 2000

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