Browse "RIMS Conference Papers" by Author Beom-Sup Kim
Showing results 1 to 25 of 25
| 16-bit DSP and system for baseband/voiceband processing of IS-136 cellular telephony Beom-Sup Kim, Asia and South Pacific Design Automation Conference 1999, Asia and South Pacific Design Automation Conference, 1999-01 |
| A 1.8-GHz Self-calibrated Phase-locked Loop with Precise I/Q Matching Beom-Sup Kim, AP-ASIC 2000 Proceedings of the Second IEEE Asia Pacific Conference on, pp.81 - 84, IEEE, 2000-08 |
| A 13 bit 2.5 MHz Self-Calibrated Pipelined A/D Converter in 3um CMOS Beom-Sup Kim, IEEE Symposium on VLSI CIrcuits, pp.33 - 34, 1990 |
| A 250MHz Low Jitter Adaptive Bandwidth PLL Beom-Sup Kim, IEEE International Solid-State Circuit Conferece, 1999 |
| A 30MHz High-Speed Analog/Digital PLL in 2um CMOS Beom-Sup Kim, IEEE Int. Conf. on Solid-State Circuits, pp.104 - 105, 1990 |
| A 5-GHz Band I/Q Generator using a Self-Calibration Technique Beom-Sup Kim; Hyung-Cheol Shin, European Solid-State Circuit Conference, pp.807 - 810, 2002 |
| A 640 MB/s Bi-Directional Data Strobed, Double-Data-Rate SDRAM with a 40mW DLL Circuit for a 256MB Memory System Beom-Sup Kim, IEEE International Solid State Circuits Conference, 1998 |
| A Digital Audio Signal Processor for Cellular Phone Application Beom-Sup Kim, ASP-DAC, pp.183 - 187, 1995 |
| A Digital Phase-Locked Loop with Loop Gains Derived from RLS Method Beom-Sup Kim, IEEE International Conf. on Communications, pp.11 - 15, 1997 |
| A fully Integerated Low Noise RF Frequncy Synthesizer Design for Mobile Communication Application Beom-Sup Kim, IEEE Symposium on VLSI Circuits, pp.56 - 57, 1996 |
| A High Speed Digital Data Separator Design Using Real Time DSP for DISK Drive Applications Beom-Sup Kim, IEEE International Symposium on Circuit and Systems, 1992 |
| A Low Jitter Digital Timing Synchronizer for CAP-based VDSL System Beom-Sup Kim, ESSCIRC 2001, pp.168 - 171, 2001 |
| A Low Jitter Mixed DLL for High Speed DRAMs Beom-Sup Kim, IEEE European Solid-State Circuits Conference, 1999 |
| A Low Jitter, Fast Locking Delay Locked Loop using Measure and Control Scheme Beom-Sup Kim, Southsets Symposium on Mixed-Signal Design, pp.45 - 50, SSMSD, 2001-02 |
| Adaptive Carrier Recovery Using Dual Loop DPLL for Mobile Communication Applications Beom-Sup Kim, IEEE Int. Conf. on Communication, pp.1757 - 1761, 1993 |
| All CMOS Analog Pulse Detection System for Data Storage Applicaions Beom-Sup Kim, IEEE International Symposium on Circuit and Systems, 1992 |
| Analysis of Timing Jitter in CMOS Ring Oscillators Beom-Sup Kim, IEEE International Symposium on Circuit and Systems, pp.27 - 30, 1994 |
| Digital Carrier Recovery with Adaptive Dual Loop DPLL for Mobile Communication Applications Beom-Sup Kim, IEEE International Conference on Acoustics, Speech & Signal Processing, pp.29 - 32, 1993 |
| Dual-Loop Digital PLL Design for Adaptive Clock Recovery Beom-Sup Kim, ASP-DAC'98, pp.347 - 352, ASP-DAC, 1998-02 |
| Low Jitter Digital Timing Synchronizer for CAP-based VDSL System Beom-Sup Kim, European Solid-State Circuits Conference, pp.146 - 147, 2001 |
| Low Noise Clock Synthesizer Design Using Optimal Bandwidth Beom-Sup Kim, IEEE International Symposium on Circuits and Systems, 1998 |
| Low Power CMOS on Chip Voltage Reference Using MOS PTAT Beom-Sup Kim, IEEE International ASIC conference, pp.316 - 320, 1997 |
| MIGHTI : A High Performance 16-bit DSP for Mobile Communication Applications Beom-Sup Kim, European Solid-State Circuits Conference (ESSCIRC '98), 1998 |
| Optimal MMSE Gear-Shifting Algorithm for the Fast Synchronization of DPLL Beom-Sup Kim, IEEE International Symposium on Circuit and Systems, pp.172 - 175, 1993 |
| Symbol Timing Recovery Using Digital Spectral Line Method for 16-CAP VDSL System Beom-Sup Kim, IEEE GLOBECOM, IEEE, 1998-11 |
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Type
- 3,515 Conference
Date issued
- 324 2020 - 2023
- 961 2010 - 2019
- 1,104 2000 - 2009
- 918 1990 - 1999
- 155 1980 - 1989