A Hybrid-Domain Two-Step Time-to-Digital Converter Using a Switch-Based Time-to-Voltage Converter and SAR ADC

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In this brief, an energy-efficient time-to-digital converter (TDC) using a hybrid of time-and voltage-domain circuits is presented. The proposed TDC operates in two steps, i.e., first in the time domain by using a delay-line TDC and then in the voltage domain by using a successive-approximation-register analog-to-digital converter. The time residue of the first stage is converted to voltage by using a switch-based time-to-voltage converter (TVC) that eliminates the need for a current source with large output impedance. To improve the linearity of the proposed TVC, pseudodifferential time-domain signaling is presented. A prototype chip fabricated in the 65-nm CMOS achieves 630 fs of time resolution at 120 megasamples/s while consuming 3.7 mW from a 1.2-V supply. The figure of merit is 244 fJ/conversion-step, which is the best among the recently published high-speed TDCs.
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Issue Date
2015-07
Language
English
Article Type
Article
Keywords

CMOS

Citation

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.62, no.7, pp.631 - 635

ISSN
1549-7747
DOI
10.1109/TCSII.2015.2415631
URI
http://hdl.handle.net/10203/200160
Appears in Collection
EE-Journal Papers(저널논문)
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