13761 | Design of Improved Nonlinear Controller Using Boundary Layer Integral Sliding Mode for Speed Control of PM Synchronous Motor In-CheoI Baik; Kyeong-Hwa Kim; Gun-Woo Moon; Dae-Sik Lee; Myung-Joong Youn, JOURNAL OF KOREAN INSTITUTE OF ELECTRICAL ENGINEERS, v.1, no.3, pp.25 - 31, 1996-09 |
13762 | Design of IMT-2000 SSP Based on Advanced Intelligent Network, 정윤원; 정민영; 성단근, Advanced Intelligent Networks 1997, pp.14 - 18, Advanced Intelligent Networks 1997, 1997-09 |
13763 | Design of Infrared Emitter Device for Infrared Scene Projector Shin, Young Bong; Lee, Hee Chul; Park, Ki Won; Kang, In Ku, AWAD2016, IEICE, 2016-07-04 |
13764 | Design of Integral Droop Control for Hybrid Energy Storage System Considering Ramp Rate Characteristic Choi, Seung-Hyun; Kim, Jae-Sang; Park, Jeong-Eon; Yu, Donghyeon; Moon, Gun-Woo, 2022 International Power Electronics Conference, IPEC-Himeji 2022-ECCE Asia, pp.2359 - 2363, Institute of Electrical and Electronics Engineers Inc., 2022-05 |
13765 | Design of integral-augmented optival variable structure controllers = 적분형 최적 가변구조 제어기의 설계link Lee, Jung-Hoon; 이정훈; et al, 한국과학기술원, 1995 |
13766 | Design of intelligent wheelchair for the motor disabled Kim, Byung Kook; Kim, Chong Hui; Jung, Jik Han, Proceedings of the ICORR2003, pp.92 - 95, 2003-04 |
13767 | Design of interference-resilient touch controller IC using hybrid spread spectrum and multiple sensing techniques = 다중 감지 기법 및 혼합 대역 확신 기법을 이용한 외부 간섭에 강인한 터치 컨트롤러 IC의 설계link Ko, Seunghoon; 고승훈; et al, 한국과학기술원, 2014 |
13768 | Design of Interval Type-2 Fuzzy Logic Controllers for Flocking Algorithm Lee, Seung-Mok; Kim, Jong-Hwan; Myung, Hyun, IEEE International Conference on Fuzzy Systems, IEEE, 2011-06-30 |
13769 | Design of IPv6 tactical network based on commercial technologies: Architecture, routing, and mobility management Kim, B.C.; Lee, J.S.; Bang, Y.; Lee, J.K.; Lee, Hwang Soo; Ma, J.S., 10th International Conference on Advanced Communication Technology, ICACT 2008, pp.708 - 713, IEEE, 2008-02-17 |
13770 | Design of KU-band slotted waveguide antenna array = KU밴드용 도파관 슬롯 안테나 디자인link Aditya Prabaswara; Aditya; et al, 한국과학기술원, 2014 |
13771 | Design of lateral OGBT protection circuit for smart power integration Cho, Byung Jin; Luo, JY; Liang, YC, Proc. of 1999 International Conf. on Power Electronics and Drive System, pp.0 - 0, 1999-07-27 |
13772 | Design of lens for optimum focusing in annular array system = Annular array system에서 최적 집속을 위한 lens의 설계link Rho, Gyoung-Tae; 노경태; et al, 한국과학기술원, 1988 |
13773 | Design of LIGBT protection circuit for smart power integration Luo, JY; Liang, YC; Cho, Byung Jin, IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, v.47, no.4, pp.744 - 750, 2000-08 |
13774 | Design of likelihood ratio-based energy detectors considering stochastic analysis of non-identically distributed samples in cognitive radio networks = 인지 무선 통신망에서 비균일 샘플 분포의 확률적 해석을 고려한 우도비 기반 에너지 검출기 설계link Cho, Yeon-Jea; 조연제; et al, 한국과학기술원, 2016 |
13775 | Design of linear and noiseless self-jammer cancellation circuit in UHF RFID = 극초단파 RFID에서 선형적이고 잡음이 없는 자가교란신호 상쇄 회로의 설계link Lee, Jong-Hun; 이종훈; et al, 한국과학기술원, 2014 |
13776 | Design of linearity enhancement and multi-band power amplifier for wireless comminications = 무선 통신용 선형성 향상 및 다중 대역 전력증폭기 설계link Kim, Ho-Sung; 김호성; et al, 한국과학기술원, 2010 |
13777 | Design of longitudinal contoller for passenger car using laser scanner distance sensor Oh, Sang-Keon; Kang, Young-Hoon; Lee, Ju-Jang, Proceedings of Control, Automation and Robotics, pp.451 - 454, Proceedings of Control, Automation and Robotics, 1998-03 |
13778 | Design of low complexity concatenated polar codes and its analysis = 저복잡도 폴라 연접 부호의 설계 및 분석link Park, jae Yong; Moon, Jaekyun; et al, 한국과학기술원, 2019 |
13779 | Design of low cost, scalable, and high-performance TiS2 thermoelectric materials via wet ball-milling process Veluswamy, Pandiyarasan; Subramanian, Saravanan; ul Hassan, Muhmood; Yavuz, Cafer T.; Ryu, Ho Jin; Cho, Byung Jin, JOURNAL OF MATERIALS SCIENCE-MATERIALS IN ELECTRONICS, v.33, no.11, pp.8822 - 8832, 2022-04 |
13780 | Design of low jitter DLL/PLL for on-chip and off-chip synchronizations = 칩 내부 및 칩 외부 동기화를 위한 낮은 지터의 DLL/PLL 설계link Kim, Byung-Guk; 김병국; et al, 한국과학기술원, 2008 |