Browse "School of Electrical Engineering(전기및전자공학부)" by Title
Showing results 38441 to 38460 of 50978
| Vertical FET fabrication for optoelectronic integrated circuit = 광전 집적 회로를 위한 수직형 전계 효과 트랜지스터의 제작link Kim, Chang-Tae; 김창태; et al, 한국과학기술원, 1990 |
| Vertical Graphene Field-Effect Transistor using Direct Growth Graphene Nanoribbon 홍슬기; 봉재훈; 황완식; 조병진, The 2nd Korean Graphene Symposium, 한국그래핀연구회, 2015-03-26 |
| Vertical Inductive Bridge EBG (VIB-EBG) Structure With Size Reduction and Stopband Enhancement for Wideband SSN Suppression Kim, Myung-Hoi; Koo, Kyoung-Choul; Kim, Joung-Ho; Kim, Ji-Seong, IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, v.22, no.8, pp.403 - 405, 2012-08 |
| Vertical InGaAs Biristor for Sub-1 V Operation Kim, Wu-Kang; Bidenko, Pavlo; Kim, Jongmin; Sim, Jaeho; Han, Joon-Kyu; Kim, Seongkwang; Geum, Dae-Myeong; et al, IEEE ELECTRON DEVICE LETTERS, v.42, no.5, pp.681 - 683, 2021-05 |
| Vertical integration of an LED and a vertical transistor using selective MOCVD Hong Chang-Hee; Kim Chang-Tae; Kwon, Young Se, 22nd International Conference on Solid State Devices and Materials, pp.529 - 532, 1990-08-22 |
| VERTICAL INTEGRATION OF GAAS/ALGAAS LASER DIODE AND VERTICAL JFET Yoo, Hoi-Jun; Kwon, Young Se, JAPANESE JOURNAL OF APPLIED PHYSICS PART 2-LETTERS, v.27, no.3, pp.431 - 433, 1988-03 |
| VERTICAL INTEGRATION OF LASER DIODE AND TRANSISTOR. Yoo Hoi-Jun; Kwon, Young Se, Proceedings - TENCON 87: 1987 IEEE Region 10 Conference, 'Computers and Communications Technology Toward 2000'., pp.1241 - 1243, 1987 |
| Vertical micromirror fabricated in (110) silicon device layer by combination of KOH and DRIE etch Yu, Kyoungsik; Lee, D.; Solgaard, O., Lasers and Electro-Optics Society, 2004. LEOS 2004. The 17th Annual Meeting of the IEEE, v.2, pp.531 - 532, IEEE/LEOS International Conference on Optical MEMS, 2004-11-07 |
| Vertical Mirror Fabrication Combining KOH Etch and DRIE of (110) Silicon Lee, D; Yu, Kyoungsik; Krishnamoorthy, U; Solgaard, O, JOURNAL OF MICROELECTROMECHANICAL SYSTEMS, v.18, no.1, pp.217 - 227, 2009-02 |
| Vertical multi-stacked electromagnetic bandgap structure for power/ground noise isolation in the multi-layer package and printed circuit board = 다층 패키지 및 PCB에서의 전력/접지 잡음 억제를 위한 수직의 다층 적층 EBG 구조link Yoo, Jeong-Sik; 유정식; et al, 한국과학기술원, 2009 |
| Vertical Noise Coupling From On-Chip Switching-Mode Power Supply in a Mixed-Signal Stacked 3-D-IC Koo, Kyoung-Choul; Kim, Myung-Hoi; Kim, Jonghoon J.; Kim, Joung-Ho; Kim, Ji-Seong, IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, v.3, no.3, pp.476 - 488, 2013-03 |
| Vertical Noise Coupling from On-chip Switching-Mode Power Supply in a Mixed-Signal Stacked 3D-IC Koo, Kyoungchoul; Kim, Myunghoi; Kim, Joungho, DesignCon2012, DesignCon2012, 2012-02-01 |
| Vertical Noise Coupling on Wideband Low Noise Amplifier from On-chip Switching-Mode DC-DC Converter in 3D-IC Koo, Kyoungchoul; Lee, Sangrok; Kim Joungho, 8th International Workshop on Electromagnetic Compatibility of Integrated Circuits, EMC 2011, 2011-11-07 |
| Vertical Partitioing of Row-Based Circuits with Minimal Net-Crossings Park, In-Cheol; Kyung, Chong-Min, IEEE International Sympoisum on Circuits and Systems, 1991-06 |
| Vertical stacking of three-dimensional nanostructures via an aerosol lithography for advanced optical applications Lee, Kiwoong; Choi, Hoseop; Kim, Dae Seong; Jang, Min Seok; Choi, Mansoo, NANOTECHNOLOGY, v.28, no.47, 2017-10 |
| Vertical Stepped Impedance EBG (VSI-EBG) Structure for Wideband Suppression of Simultaneous Switching Noise in Multilayer PCBs Kim, Myung-Hoi; Koo, Kyoung-Choul; Shim, Yu-Jeong; Hwang, Chul-Soon; Pak, Jun-So; Ahn, Seung-Young; Kim, Joung-Ho, IEEE TRANSACTIONS ON ELECTROMAGNETIC COMPATIBILITY, v.55, no.2, pp.307 - 314, 2013-04 |
| Vertical Thrusting Unmanned Surface Vehicle for Stable and Close Inspection of Bridge Structure Kim, Kyukwang; Hyun, Jieum; Choi, Duckyu; Myung, Hyun, The 16th International Conference on Control, Automation and Systems (ICCAS 2016), Institute of Control, Robotics, and systems, 2016-10-18 |
| Vertical Tree 3-dimensional TSV Clock Distribution Network in 3D IC Kim, Dayoung; Kim, Joohee; Pak, Jun So; Kim, Joungho; Lee, Hyungdong; Lee, Junho; Pak, Kunwoo, Vertical Tree 3-dimensional TSV Clock Distribution Network in 3D IC, Vertical Tree 3-dimensional TSV Clock Distribution Network in 3D IC, 2012-05-29 |
| Vertical tunneling field effect transistor based on Si-MoS2 van der Waals heterojunction Shin, Gwang Hyuk; Park, Hamin; Lee, Khang Jun; Choi, Sung-Yool, RPGR 2019: Recent Progress in Graphene and Two-dimensional Materials Research Conference, Recent Progress in Graphene and Two-dimensional Materials Research, 2019-10-08 |
| Vertical tunneling filed effect transistor based on p++ silicon and MoS2 heterostructure Shin, Gwang Hyuk; Park, Hamin; Koo, BonDae; Woo, youngjun; LEE, JAEEUN; Choi, Sung-Yool, 제 5회 한국 그래핀 심포지엄, 제 5회 한국 그래핀 심포지엄, 2018-03-29 |
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