Showing results 1 to 4 of 4
3.125-to-28.125 Gb/s 4.72 mW/Gb/s Multi- Standard Parallel Transceiver Supporting Channel-Independent Operation in 40-nm CMOS Yoon, Jong-Hyeok; Kwon, Kyeongha; Bae, Hyeon-Min, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v.67, no.8, pp.2647 - 2658, 2020-08 |
A 4 x 10-Gb/s Referenceless-and-Masterless Phase Rotator-Based Parallel Transceiver in 90-nm CMOS Lee, Joon Yeong; Yang, Jaehyeok; Yoon, Jong Hyeok; Kwon, Soon Won; Won, Hyosup; Han, Jinho; Bae, Hyeon-Min, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, v.24, no.6, pp.2310 - 2320, 2016-06 |
A low-power high-speed transceiver IC design techniques for NRZ-PAM-4 signaling = NRZ/PAM-4 시그널링을 위한 저전력 고속 트랜시버 IC 설계 기술link Yoon, Taehun; 윤태훈; et al, 한국과학기술원, 2017 |
(A) power-and-area efficient bootstrap transceiver for referenceless and lane-independent operation = 기준 클럭 없이 동작가능하고 채널간의 독립적인 운용이 가능하면서도 전력과 면적 효율적인 부트스트랩 송수신기 설계link Lee, Joon-Yeong; 이준영; et al, 한국과학기술원, 2017 |
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