Browse "School of Electrical Engineering(전기및전자공학부)" by Subject parallel processing

Showing results 1 to 7 of 7

1
A fast variable-length decoder using plane separation

Jeon, JH; Park, YS; Park, HyunWook, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR VIDEO TECHNOLOGY, v.10, no.5, pp.806 - 812, 2000-08

2
An efficient scheme for In-loop fltering across tile boundaries for multi-core HEVC hardware decoders with 4K/8K-UHD video applications = 4K/8K-UHD용 다중코어 HEVC 하드웨어 디코더의 타일 경계를 위한 효율적인 인루프 필터링 방법 연구link

Cho, Seunghyun; 조승현; et al, 한국과학기술원, 2015

3
Diffusion MRI data parallel processing using multi-GPU = 다중 GPU 기반 병렬처리를 이용한 확산텐서영상 처리link

Lee, Jung-Soo; 이정수; et al, 한국과학기술원, 2012

4
Efficient In-Loop Filtering Across Tile Boundaries for Multi-Core HEVC Hardware Decoders With 4 K/8 K-UHD Video Applications

Cho, Seunghyun; Kim, HyunMi; Kim, Hui Yong; Kim, Mun-Churl, IEEE TRANSACTIONS ON MULTIMEDIA, v.17, no.6, pp.778 - 791, 2015-06

5
Energy-efficient embedded media application processor = 에너지 효율적인 임베디드 미디어 어플리케이션 프로세서link

Kim, Hyo-Eun; 김효은; et al, 한국과학기술원, 2013

6
KAIST image computing system (KICS): A parallel architecture for real-time multimedia data processing

Jeon, J; Kim, HS; Choi, G; Park, HyunWook, JOURNAL OF SYSTEMS ARCHITECTURE, v.46, no.15, pp.1403 - 1418, 2000-12

7
SimpleSSD: Modeling Solid State Drives for Holistic System Simulation

Jung, Myoungsoo; Zhang, Jie; Abulila, Ahmed; Kwon, Miryeong; Shahidi, Narges; Shalf, John; Kim, Nam Sung; et al, IEEE COMPUTER ARCHITECTURE LETTERS, v.17, no.1, pp.37 - 41, 2018-01

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