Browse "School of Electrical Engineering(전기및전자공학부)" by Subject Transistors
Showing results 1 to 19 of 19
| A 10.8 Gb/s Quarter-Rate 1 FIR 1 IIR Direct DFE with Non-Time-Overlapping Data Generation for 4:1 CMOS Clockless Multiplexer Lee, Daewoong; Lee, Dongil; Kim, Yong-Hun; Jeon, Hyun-Kyu; Kim, Byung-Guk; Kim, Lee-Sup, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.67, no.1, pp.67 - 71, 2020-01 |
| A 2.65-pJ/Bit 12.5-Gb/s 60-GHz OOK CMOS Transmitter and Receiver for Proximity Communications Byeon, Chul Woo; Eun, Ki Chan; Park, Chul Soon, IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, v.68, no.7, pp.2902 - 2910, 2020-07 |
| A 28 GHz RF-DAC With Analog LO Leakage Cancellation Yoo, Jongho; Hong, Songcheol, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.69, no.11, pp.4308 - 4312, 2022-11 |
| A 28-GHz CMOS Power Amplifier Linearized by Dynamic Conductance Control and Body Carrier Injection Lee, Wonho; Yoo, Jongho; Hong, Songcheol, IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, v.31, no.9, pp.1071 - 1074, 2021-09 |
| A 60-GHz Low-Power Active Phase Shifter With Impedance-Invariant Vector Modulation in 65-nm CMOS Park, Geon Ho; Byeon, Chul Woo; Park, Chul Soon, IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, v.68, no.12, pp.5395 - 5407, 2020-12 |
| A Junctionless Single Transistor Neuron with Vertically Stacked Multiple Nanowires for Highly Scalable Neuromorphic Hardware Han, Joon-Kyu; Yu, Ji-Man; Choi, Yang-Kyu, IEEE TRANSACTIONS ON ELECTRON DEVICES, v.69, no.6, pp.3142 - 3146, 2022-06 |
| A K-Band Dual-Mode Common Gate Cross-Summing VG-LNA With Low Phase Variation Park, Seonjeong; Wang, Seunghun; Hong, Songcheol, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.68, no.7, pp.2438 - 2442, 2021-07 |
| A Single BJT Bandgap Reference With Frequency Compensation Exploiting Mirror Pole Kim, Myungjun; Cho, SeongHwan, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.56, no.10, pp.2902 - 2912, 2021-10 |
| An Efficient V-Band Frequency Tripler With Back-to-Back Connected Varactors Yoo, Jongho; Hong, Songcheol, IEEE MICROWAVE AND WIRELESS TECHNOLOGY LETTERS, v.33, no.8, pp.1219 - 1222, 2023-08 |
| An Overturned Charge Injection Synaptic Transistor with a Floating-gate for Neuromorphic Hardware Computing Kim, Myung-Su; Kim, Jin-Ki; Yun, Gyeong-Jun; Yu, Ji-Man; Han, Joon-Kyu; Lee, Jung-Woo; Seo, Seokho; et al, IEEE ELECTRON DEVICE LETTERS, v.43, no.9, pp.1440 - 1443, 2022-09 |
| An Overview of Processing-in-Memory Circuits for Artificial Intelligence and Machine Learning Kim, Donghyuk; Yu, Chengshuo; Xie, Shanshan; Chen, Yuzong; Kim, Joo-Young; Kim, Bongjin; Kulkarni, Jaydeep P.; et al, IEEE JOURNAL ON EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS, v.12, no.2, pp.338 - 353, 2022-06 |
| Analysis and Design of Power-Efficient H-Band CMOS Frequency Doubler Employing Gain Boosting and Harmonic Enhancing Techniques Moon, Byeong-Taek; Yun, Byeonghun; Kim, Jusung; Lee, Sang-Gug, IEEE ACCESS, v.11, pp.34942 - 34951, 2023 |
| Double-Gate and Body-Contacted Nonvolatile Oxide Memory Thin-Film Transistors for Fast Erase Programming Yang, Jong-Heon; Byun, Chun-Won; Pi, Jae-Eun; Kim, Hee-Ok; Hwang, Chi-Sun; Yoo, Seunghyup, IEEE TRANSACTIONS ON ELECTRON DEVICES, v.69, no.1, pp.120 - 126, 2022-01 |
| DynaPlasia: An eDRAM In-Memory Computing-Based Reconfigurable Spatial Accelerator With Triple-Mode Cell Kim, Sangjin; Li, Zhiyong; Um, Soyeon; Jo, Wooyoung; Ha, Sangwoo; Lee, Juhyoung; Kim, Sangyeob; et al, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.59, no.1, pp.102 - 115, 2024-01 |
Low-Power True Random Number Generator Based on Randomly Distributed Carbon Nanotube Networks Kim, Sungho; Kim, Moon-Seok; Lee, Yongwoo; Kim, Hee-Dong; Choi, Yang-Kyu; Choi, Sung-Jin, IEEE ACCESS, v.9, pp.91341 - 91346, 2021-06 |
| One Biristor-Two Transistor (1B2T) Neuron With Reduced Output Voltage and Pulsewidth for Energy-Efficient Neuromorphic Hardware Han, Joon-Kyu; Yun, Gyeong-Jun; Han, Seong-Joo; Yu, Ji-Man; Choi, Yang-Kyu, IEEE TRANSACTIONS ON ELECTRON DEVICES, v.68, no.1, pp.430 - 433, 2021-01 |
| Quantum transport of holes in 1D, 2D, and 3D devices: the k center dot p method Shin, Mincheol, JOURNAL OF COMPUTATIONAL ELECTRONICS, v.10, no.1-2, pp.44 - 50, 2011-06 |
| Radiation-Hardened Sensor Interface Circuit for Monitoring Severe Accidents in Nuclear Power Plants Jeon, Hyuntak; Kwon, Inyong; Je, Minkyu, IEEE TRANSACTIONS ON NUCLEAR SCIENCE, v.67, no.7, pp.1738 - 1745, 2020-07 |
| SRAM-Based Computing-in-Memory Macro With Fully Parallel One-Step Multibit Computation Choi, Edward Jongyoon; Choi, Injun; Jeon, Chanhee; Yun, Gichan; Yi, Donghyeon; Ha, Sohmyung; Chang, Ik-Joon; et al, IEEE SOLID-STATE CIRCUITS LETTERS, v.5, pp.234 - 237, 2022 |
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