Browse "School of Electrical Engineering(전기및전자공학부)" bySubjectPACKAGE

Showing results 1 to 12 of 12

1
Chip package hybrid I/O clock distribution for 2Gbps DDR graphic memory = 2기가 bps급 DDR 그래픽 메모리를 위한 칩 패키지 하이브리드 I/O클럭 분배에 관한 연구link

Ryu, Chung-Hyun; 류충현; et al, 한국과학기술원, 2004

2
Design of a low-noise UWB transceiver SiP

Yoon, CW; Park, YJ; Lee, JW; Park, HJ; Kim, JM; Pak, JS; Kim, Jounghoresearcher, IEEE DESIGN & TEST OF COMPUTERS, v.25, pp.18 - 28, 2008-01

3
Ferrofluid-based triboelectric-electromagnetic hybrid generator for sensitive and sustainable vibration energy harvesting

Seol, Myeong-Lok; Jeon, Seung-Bae; Han, Jin-Woo; Choi, Yang-Kyuresearcher, NANO ENERGY, v.31, pp.233 - 238, 2017-01

4
Ferromagnetic nanoparticle-embedded hybrid nanogenerator for harvesting omnidirectional vibration energy

Kim, Daewon; Jin, Ik Kyeong; Choi, Yang-Kyuresearcher, NANOSCALE, v.10, no.26, pp.12276 - 12283, 2018-07

5
Interposer Power Distribution Network (PDN) Modeling Using a Segmentation Method for 3-D ICs With TSVs

Kim, Kiyeong; Yook, Jong Min; Kim, Junchul; Kim, Heegon; Lee, Junho; Park, Kunwoo; Kim, Jounghoresearcher, IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, v.3, no.11, pp.1891 - 1906, 2013-11

6
Modeling and Analysis of a Power Distribution Network in TSV-Based 3-D Memory IC Including P/G TSVs, On-Chip Decoupling Capacitors, and Silicon Substrate Effects

Kim, Ki-Yeong; Hwang, Chul-Soon; Koo, Kyoung-Choul; Cho, Jong-Hyun; Kim, Hee-Gon; Kim, Joung-Horesearcher; Lee, Jun-Ho; et al, IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, v.2, no.12, pp.2057 - 2070, 2012-12

7
Modeling and measurement of interlevel electromagnetic coupling and fringing effect in a hierarchical power distribution network using segmentation method with resonant cavity model

Kim, Jae-Min; Jeong, You-Chul; Lee, Jun-Ho; Ryu, Chung-Hyun; Shim, Jong-Joo; Shin, Min-Chul; Kim, Joung-Horesearcher, IEEE TRANSACTIONS ON ADVANCED PACKAGING, v.31, pp.544 - 557, 2008-08

8
Modeling and Measurement of Power Supply Noise Effects on an Analog-to-Digital Converter Based on a Chip-PCB Hierarchical Power Distribution Network Analysis

Bae, Bumhee; Shim, Yujeong; Koo, Kyoungchoul; Cho, Jonghyun; Pak, Jun So; Kim, Jounghoresearcher, IEEE TRANSACTIONS ON ELECTROMAGNETIC COMPATIBILITY, v.55, no.6, pp.1260 - 1270, 2013-12

9
Optical interconnection using fiber-embedded boards and connection blocks fabricated by a micro-grooving technique for fiber insertion

Cho, HS; Kang, S; Cho, MH; Rho, BS; Park, HyoHoonresearcher; Shin, KU; Ha, SW; et al, JOURNAL OF MICROMECHANICS AND MICROENGINEERING, v.14, no.8, pp.1181 - 1184, 2004-08

10
PDN Impedance Modeling and Analysis of 3D TSV IC by Using Proposed P/G TSV Array Model Based on Separated P/G TSV and Chip-PDN Models

Pak, Jun-So; Kim, Joo-Hee; Cho, Jong-Hyun; Kim, Ki-Yeong; Song, Tai-Gon; Ahn, Seung-Youngresearcher; Lee, Jun-Ho; et al, IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, v.1, no.2, pp.208 - 219, 2011-02

11
Through-Silicon-Via-Based Decoupling Capacitor Stacked Chip in 3-D-ICs

Song, Eun-Seok; Koo, Kyoung-Choul; Pak, Jun-So; Kim, Joung-Horesearcher, IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, v.3, no.9, pp.1467 - 1480, 2013-09

12
Twisted differential line structure on high-speed printed circuit boards to reduce crosstalk and radiated emission

Kam D.G.; Lee H.; Kim, Jounghoresearcher, IEEE TRANSACTIONS ON ADVANCED PACKAGING, v.27, no.4, pp.590 - 596, 2004-11

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