Browse "School of Electrical Engineering(전기및전자공학부)" by Subject Dual-loop architecture
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| A 5.4-Gb/s Clock and Data Recovery Circuit Using Seamless Loop Transition Scheme With Minimal Phase Noise Degradation Lee, Won-Young; Kim, Lee-Sup, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v.59, no.11, pp.2518 - 2528, 2012-11 |
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