Browse "School of Electrical Engineering(전기및전자공학부)" by Author 1380
Showing results 22 to 81 of 214
| Channel mobility behaviour in high-K/metal gate NMOSFETs Cho, Byung Jin; Mathew, S; Bera, LK; Balasubramanian, N; Joo, MS, 2nd International Conference on Materials for Advanced Technologies, pp.516 - 516, 2003-12-11 |
| Channel-width effect on hot-carrier degradation in NMOSFETs with recessed-LOCOS isolation structure Cho, Byung Jin; Yue, JMP; Chim, WK; Qin, WH; Chan, DSH; Kim, YB; Jang, SA, Proc. of the 7th International Symp. on the Physical and Failure Analysis of Integrated Circuits (I, pp.94 - 94, 1999-07-05 |
| Characterization of Ultrathin Plasma Nitrided Gate Dielectrics in PMOSFET for 0.18µm Technology and Beyond Cho, Byung Jin; Tan, SS; Ang, CH; Lek, CM; Chen, T; See, A; Chan, L, 9th International Symp. on the Physical and Failure Analysis of Integrated Circuits (IPFA), pp.254 - 254, 2002-07-08 |
| Charge transfer phenomena in Graphene Cdse/ZnS quantum dot system and their application Klekaachev, AV; Asselberghs, I; N.Kuznetsov, S; Cantoro, M; Mun, JH; Cho, Byung Jin; Hofkens, J; et al, Graphene Week 2012, 2012-06 |
| Chemical Analysis and Thermal Curing Effects of CVD graphene during transfer process Hong, Seul Ki; Cho, Byung Jin, Graphene 2012, 2012-04 |
| Chemical and Electrical Analysis of CVD Grown Graphene During Layer Transfer Process From Metal to Dielectric Substrate Hong, Seul Ki; Song, Seung Min; Cho, Byung Jin, Nature conference - Graphene : The Road to Applications, Nature Publishing Group, 2011-05 |
| Correlation between interface traps and gate laeakage in ultra-thin silicon dioxide Cho, Byung Jin; Loh, WY; Li, MF; Lek, CM; Yong, YF; Joo, MS, 9th International Symp. on the Physical and Failure Analysis of Integrated Circuits (IPFA), pp.246 - 246, 2002-07-08 |
| Cubic structured HfLaO dielectrics for MIM capacitor for RF IC applications Zhang, L.; He, W.; Chan, D.S.H.; Cho, Byung Jin, International Symposium on Silicon Nitride, Silicon Dioxide, and Emerging Dielectrics - 215th Meeting of the Electrochemical Society, v.19, pp.615 - 623, 2009-05-24 |
| Damage free etching of RuO2 in O2/He plasma Cho, Byung Jin; Hwang, WS; Bliznetsov, VN; Chan, DSH; Yoo, WJ, 28th International Symposium on Dry Process, pp.0 - 0, 2006-11-29 |
| Demonstration of High Performance PMOSFETs Using Si/SixGe1-x/Si Quantum Wells with High-k/Metal Gate Stacks and Uniaxial Strain Additivity for 22 nm T Cho, Byung Jin; Suthram, S; Majhi, P; Sun, G; Kalra, P; Harris, R; Choi, KJ, International Electron Device Meeting (IEDM) 2007, pp.0 - 0, 2007-12-01 |
| Demonstration of Low Vt NMOSFETs Using Thin HfLaO in ALD TiN/HfSiO Gate Stack Cho, Byung Jin; Park, CS; Song, SC; Bersuker, G; Alshareef, HN; Ju, BS; Majhi, 2006 International Conference on Solid State Devices and Materials (SSDM 2006), pp.0 - 0, 2006-09-12 |
| Dependence of Electrical and Mechanical Properties of Graphene on Different Dielectric Substrates Cho, Byung Jin; Song, Seung Min, 2010 Material Research Society Spring Meeting, 2010 Material Research Society Spring Meeting, 2010-04-07 |
| Design of IGBT gate drive with SOA consideration Cho, Byung Jin; Luo, J; Liang, YC, IEEE Power Electronics Drives and Energy systems for Industrial Growth (PEDES)' 98, pp.307 - 307, 1998-11-30 |
| Design of lateral OGBT protection circuit for smart power integration Cho, Byung Jin; Luo, JY; Liang, YC, Proc. of 1999 International Conf. on Power Electronics and Drive System, pp.0 - 0, 1999-07-27 |
| Dopant Segregated Pt and Ni-Germanide Schottky S/D p-MOSFETs with Strained Si-SiGe channel, 211th Electrochemical Society Meeting, SYMPOSIUM E1 Cho, Byung Jin; Zang, H; Chua, CK; Loh, WY, Electrochemical Society Meeting, SYMPOSIUM E1, 2007 |
| Doping of Al-catalyzed Vapor-liquid-solid Grown Si Nnanowires Cho, Byung Jin; Whang, SJ; Lee, SJ; Yang, WF; Zhu, HC; Gu, HL; Liew, YF, 2007 MRS Spring Meeting, pp.0 - 0, 2007-04-09 |
| Double spacer LOCOS process with shallow recess of silicon for 0.20 um isolation Cho, Byung Jin; Jang, SA; Song, TS; Pyi, SH; Kim, JC, International Conf. on Solid State Devices and Materials (SSDM), pp.40 - 40, 1996-08-26 |
| Dramatic Improvement of high-K Gate Dielectric Reliability by Replacing Metal Gate Electrode with Mono-Layer Graphene Park, Jong Kyung; Song, Seung Min; Mun, Jeong Hun; Cho, Byung Jin, 2012 Symposium on VLSI Technology, 2012-06 |
| Dramatic increases of dielectric constant Al2O3 by very light doping of La and thermal treatment and its application to flash memory device Park, JK; Lee, Seok-Hee; Lee, KH; Pyi, SH; Cho, Byung Jin, 제 19회 한국반도체학술대회, 고려대학교, 한국반도체산업협회,한국반도체연구조합, 2012-02-17 |
| Dual Metal and fully silicided metal gate processes with tunable workfunction Cho, Byung Jin, International NanoElectronics Materials Conference, pp.0 - 0, 2004-03-05 |
| Dual metal gate CMOS with tunable work function and high-K gate dielectrics Cho, Byung Jin, 1st International Workshop on Nanoscale Semiconductor Devices, pp.0 - 0, 2004-05-18 |
| Dual Metal Gate Process by Metal Substitution of Dopant-Free Polysilicon on High-K Dielectric Cho, Byung Jin; Park, CS; Hwang, WS; Loh, WY; Tang, LJ; Kwong, DL, Symposium on VLSI Technology, pp.48 - 49, 2005-06-14 |
| Dual metal gate process scheme for wide range work function modulation and reduced Fermi level pinning Cho, Byung Jin; Park, CS; Lwin, PW; Wong, SY; Pu, J; Hwang, WS, 3rd International Conference on Materials for Advanced Technologies, pp.41 - 41, 2005-07-03 |
| Effect of additional low temperature RTA on ultra-shallow p+-n junction formation Cho, Byung Jin; Lee, KH; Oh, JG; Kim, JC, 11th International Conf. on Ion Implantation Technology, pp.634 - 637, The Korea Society of Applied Physics, 1997-05-22 |
| Effect of electron-beam lithography on thin gate oxide reliability Cho, Byung Jin; Chong, PF; Chor, EF; Joo, MS, 8th International Symp. on the Physical and Failure Analysis of Integrated Circuits (IPFA), pp.55 - 55, 2001-07-09 |
| Effect of in-situ P doped polysilicon on gate oxide (I) - yield degradation Cho, Byung Jin; Lim, JU; Park, YJ; Kim, JC; Choi, SH, 41st Spring Meeting of the Japan Society of Applied Physics and Related Societies, pp.664 - 664, 1994-03-28 |
| Effect of in-situ P doped polysilicon on gate oxide (II) - Process condition dependence Cho, Byung Jin; Lim, JU; Park, YJ; Kim, JC; Choi, SH, 41st Spring Meeting of the Japan Society of Applied Physics and Related Societies, pp.664 - 664, 1994-03-28 |
| Effect of Ti deposition temperature on TiSi2 orientation and its thermal instability in heavility doped Si Cho, Byung Jin; Park, BH; Yu, SH; Kim, JC, 1996 Spring Meeting of Materials Research Society of Korea, pp.0 - 0, 1996-05-17 |
| Effects of Cu diffusion on MOSFET electrical properties Cho, Byung Jin; Zhu, C; Yoo, WJ; Tan, DPP; Lim, SY, 18th International VLSI Multilevel Interconnection Conf. (VMIC), pp.0 - 0, 2001-11-28 |
| Effects of Low Energy Nitrogen Plasma on the Removal of HfSiON Cho, Byung Jin; Hwang, WS; Yoo, WJ; Chan, DSH, AVS 53rd International Symposium, pp.0 - 0, 2006-11-12 |
| Effects of Post-Decoupled-Plasma-Nitridation Annealing of Ultra-Thin Gate Oxide Cho, Byung Jin; Lek, CM; Loh, WY; Ang, CH; Lin, W; Tan, YL; Zhen, JZ; et al, 9th International Symp. on the Physical and Failure Analysis of Integrated Circuits (IPFA), pp.0 - 0, 2002-07-08 |
| Electrical and Physical Properties of ALD HfLaO for CMOS Device Application Cho, Byung Jin; He, W; Kim, SJ; Kim, YS, Material Research Society 2008 Spring Meeting, 2008-03-26 |
| Electrical and physical properties of Si1-xGex/HfO2/Si MOS-capacitors Cho, Byung Jin; Wu, N; Zhu, C; Balasubramanian, N; Yeo, CC; Joo, MS; Yu, HY, 2nd International Conference on Materials for Advanced Technologies, pp.535 - 535, 2003-12-11 |
| Electrical evaluation of laser annealed junctions by Hall measurement Cho, Byung Jin; Poon, DCH; Tan, LS; Bhat, M; Chan, L, 2nd International Conference on Materials for Advanced Technologies, pp.578 - 578, 2003-12-11 |
| Electrical Properties of CMOS Devices with Cu Local Interconnects Cho, Byung Jin; Xie, H; Yoo, WJ; Zhu, C; Lim, SY; Tan, D; Lai, D, 8th International Conference on Dielectrics & Conductors for ULSI Multilevel Interconnection (DCMIC), pp.0 - 0, 2002-02-25 |
| Energy gap and band alignment of (HfO2)x(Al2O3)1-x on (100) Si by XPS Cho, Byung Jin; Yu, HY; Li, MF; Kwong, DL; Pan, JS; Ang, CH; Zheng, JZ, 2002 International Conf. on Solid State Devices and Materials (SSDM), pp.0 - 0, 2002-12-17 |
| Engineering of Voltage Nonlinearity in High-K MIM Capacitor for Analog/Mixed-Signal ICs Cho, Byung Jin; Kim, SJ; Li, MF; Ding, SJ; Yu, MB; Zhu, C; Chin, A; et al, Symposium on VLSI Technology, pp.218 - 219, 2004-06-17 |
| Enhanced Thermoelectric Performance of PEDOT:PSS Films by Treatment with Self-assembled Monolayers We, Ju Hyung; Choi, Soo Young; Kim, Sun Jin; Kim, Jin Baek; Cho, Byung Jin, The International Conference on Organic and Hybrid Thermoelectrics, Tokyo University of Science, 2016-01-19 |
| Enhancement of Dielectric Constant of HfO2 by Lanthanum Incorporation and Crystallization 조병진; He, W; Chan, DSH, 16th Korean Conference on Semiconductors, 2009-02-20 |
| Enhancement of Drain Current Saturation and Voltage Gain in Graphene-on-Silicon Field Effect Transistors Song, Seung Min; Oh, Joong Gun; Bong, Jae Hoon; Hwang, Wan Sik; Cho, Byung Jin, The 8th International Conference on Recent Progress in Graphene/2D Research, SKKU Advanced Institute of Nano Technology, 2016-09-26 |
| Enhancement of high temperature data retention by La2O3-doped nitride for charge-trap type flash memory device Park, JK; Park, Y; Lee, Seok-Hee; Lim, SK; Oh, JS; Joo, MS; Hong, K; et al, 제18회 한국반도체학술대회, 한국물리학회 반도체분과회, 한국재료학회, 대한전기학회 전기재료 연구회, 2011-02 |
| Evaluation of a vertical tube concept for RTP Cho, Byung Jin; Vandenabeele, P; Maex, K, Materials Research Society (MRS) Symp., pp.165 - 165, 1993-04-12 |
| Evaluation of SOHOS (polysilicon-oxide-high-K-oxide-silicon) structure for Flash memory device application Cho, Byung Jin; Tan, YN; Chim, WK; Choi, WK; Joo, MS; Ng, TH, International Conference on Materials for Advanced Technologies, pp.19 - 20, 2005-07-03 |
| Evaluation of Thermal Conductivity of Thin Film Thermoelectric Materials prepared by Screen Printing Technique We, Ju Hyung; Lee, Heon Bok; Kim, Sun Jin; Kim, Kuk Joo; Choi, Kyung Cheol; Cho, Byung Jin, 30th International Conference on Thermoelectrics, 2011-07 |
| Experimental results of a prototype rapid thermal annealing system 조병진; Kim, KT; Kim, CK, Conf. on CAD, Semiconductor Material and Components, pp.71 - 71, 1986-05-14 |
| Fabrication and characterization of 65nm gate length p-MOSFET integrated with bottom up grown Si nanowire Cho, Byung Jin; Yang, WF; Whang, SJ; Lee, SJ; Zhu, HC, 211th Electrochemical Society Meeting, pp.0 - 0, 2007-05-06 |
| Feasibility of Metal Carbides for Metal Gate CMOS Devices (Invited) Cho, Byung Jin; Hwang, WS, SEMI Technology Symposium, pp.233 - 238, 2008-01-10 |
| Field Effect Transistor With A Physical Gap Graphene Channel For Digital Logic Device With High On/Off Current Ratio Mun, Jeong Hun; Cho, Byung Jin, Nature conference - Graphene : The Road to Applications, Nature Publishing Group, 2011-05 |
| Field-Controlled Ion Doping of Graphene Kinder, Erich; Lu, Hao; Hwang, Wan Sik; Cho, Byung Jin; Hong, Seul Ki; Seabaugh, Alan; Fullerton-shirey, Susan, 225th ECS Meeting(Carbon Nanostructures and Devices), The electrochemical Society, 2014-05-12 |
| First Experimental Demonstration of Junctionless SiGe PMOS FinFETs on n-type Bulk-Si 김태균; 윤영광; 문정민; 문동일; 이기성; 이동욱; 황철해; et al, 제20회 한국반도체학술대회, 동부하이텍, 한국반도체산업협회, 한국반도체연구조합, 2013-02-05 |
| Flexibility improvement of screen-printed thermoelectric film by conductive polymer treatment We, Ju Hyung; Kim, Sun Jin; Kim, Gyung Soo; Cho, Byung Jin, The 32nd International Conference on Thermoelectrics, Thermoelectrics Society, 2013-07-03 |
| Flexible RRAM based on Graphene Oxide 홍슬기; 조병진, 18th Korean Conference on Semiconductors, 2011-02 |
| Flexible, Inexpensive, and Environmental-Friendly Thermoelectric Device Module Using a Screen Printing Technique Lee, Heon Bok; We, Ju Hyung; Yang, Hyun Jeong; Cho, Byung Jin, 1st International Conference on Electronic Materials and Nanotechnology for Green Environment, 2010-11 |
| Formation of Phosphorus-doped shallow source/drain junctions for Ge MOSFET Cho, Byung Jin; Poon, D; Tan, LS; Du, AY; Chan, L, 3rd International Conference on Materials for Advanced Technologies, pp.5 - 5, 2005-07-03 |
| Formation of ultra-shallow junction by point defect engineering Cho, Byung Jin; Lee, KH; Sohn, YS; Oh, JG; Kim, JC, Ion Implantation Conf., pp.0 - 0, 1996-04-05 |
| Frequency controlled thermo-acoustic resonator using a vertically aligned CNT sheet Shin, Eui Joong; Kim, Choong Sun; Kim, Dong Hwan; Choi, Jung Woo; Cho, Byung Jin, The 8th International Conference on Recent Progress in Graphene/2D Research, SKKU Advanced Institute of Nano Technology, 2016-09-26 |
| Fully silicided NiSi and germanided NiGe dual gates on Al2O3/GOI MOSFETs Cho, Byung Jin; Huang, CH; Yu, DS; Chin, A; Chen, WJ; Zhu, C; Li, MF, International Electron Device Meeting (IEDM), pp.0 - 0, 2003-12-08 |
| Functionalized graphene oxide for resistive switching memory device Hong, SK; Cho, Byung Jin, 2011 Materials Research Society (MRS) Spring Meeting, 2011-04 |
| GaAs Heteroepitaxy on SiGe-on-Insulator Using Ge Condensation and Migration Enhanced Epitaxy Cho, Byung Jin; Oh, HJ; Choi, KJ; Loh, WY; Htoo, T; Chua, SJ, Electrochemical Society Meeting, pp.0 - 0, 2007-05-06 |
| Gadolinium Oxide(Gd2O3) Blocking Layer for Fast Program and Erase Speed in SONOS-Type Flash Memory Devices Cho, Byung Jin; Pu, J; Kim, SJ; Kim, YS, Material Research Society 2008 Spring Meeting, 2008-03-25 |
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