Browse "School of Electrical Engineering(전기및전자공학부)" by Author 1108

Showing results 65 to 124 of 127

65
Global variable localization and transformation for hardware synthesis from high-level programming language description

Lee, J.-Y.; Park, In-Cheol, IEEE International Symposium on Circuits and Systems (ISCAS 2001), v.5, pp.13 - 16, IEEE, 2001-05-06

66
Guiding the Standard-Cell Placements for Regular Layout Structure Using Virtual Net

Yi, YS; Park, In-Cheol, 2003 SoC Design Conference(SDC), pp.6 - 9, 2003-11-05

67
H.264/AVC Main Profile의 실시간 복호화를 위한 CABAC 복호기의 설계

이용석; 박인철, SoC 학술대회, pp.299 - 302, 2005-03-21

68
Hardware Accelerator for Scalable Hangul Font Generation

Hwang, G.C.; Lee, Y.T.; Park, In-Cheol; Lee, T. H.; Bae, J.H.; Kyung, Chong-Min, Joint Technical Conference on Citcuits/Systems, Computers and Communications, pp.246 - 250, 대한전자공학회, 1990

69
HDL Saver Allowing Restrat after Souce Modification

Chang, Y.S.; Lee, S.J.; Park, In-Cheol; Kyung, Chong-Min, APCHDL'98, pp.23 - 27, 1998-07

70
High Performance Embedded Processor with Multiple Register Sets and Hardware Context Manager

Han, JH; Kim, JH; Park, In-Cheol, 2005년도 SOC 학술대회 , pp.159 - 163, 대한전자공학회, 2005-03-21

71
High Speed Decoding of Context-based Adaptive Binary Arithmetic Code using Most Probable Symbol Prediction

김충효; 박인철, 제12회 한국 반도체 학술대회 , pp.31 - 32, 2005-02

72
History-Based Memory Mode Prediction for Improving Memory Performance

Park , SI; Park, In-Cheol, SOC Design Conference, 2002-10

73
HK386: An x86-compatible 32 bit CISC microprocessor

Kang, Y.J.; Park, S.H.; Kim, J.S.; Kim, D.T.; Maeng, S.R.; Cho,i H.; Lee, S.J.; et al, Proceedings of the 1997 Asia and South Pacific Design Automation Conference, ASP-DAC, pp.661 - 662, 1997-01-28

74
Image Signal Processor for CMOS image sensors with Merged Operations

Kim , K; Park, In-Cheol, The 12th Korean Conference on Semiconductors, pp.29 - 30, 2005-02

75
Implementation of Efficient Embedded Environment Adopting On-chip Debug system

이영주; 송진욱; 김봉진; 김은찬; 임고은; 박인철, 대한전자공학회 하계종합학술대회, 대한전자공학회, 2010-06-17

76
Implementation of Generator for Various Area-efficient High-performance Reed-Solomon Decoders

유호영; 이영주; 박인철, 대한전자공학회 추계학술대회, 대한전자공학회, 2011-11-26

77
Implementation of Prefetch Unit Capable of Branch Prediction for RISC Processor

김창현; 박인철, 대한전자공학회 추계학술대회, 대한전자공학회, 2011-11-26

78
Instruction set generation considering the intermediate representation of compilers

Park, In-Cheol; Lee , J.Y., SOC Design Conference, pp.276 - 281, 2001-11

79
Issues in the Design of the Marcia Internal Cache

Chang, Y.S.; Park, In-Cheol; Kyung, Chong-Min, International Conference on Chip Technology, 1998-04

80
JPEG2000 Encoder Using Core-A

Song, J; Rhu , MS; Park, In-Cheol, IEEE International SoC Design Conference (ISOCC 2010) Chip Design Contest, IEEE, 2010-11

81
JPEG2000을 위한 Lifting-based Forward DWT의 VLSI구조

김정욱; 강형주; 박인철, 대한전자공학회 추계학술대회, 대한전자공학회, 2003-11-29

82
Loop and Address Code Optimization for Digital Signal Processors

Lee, JY; Park, In-Cheol, 한국반도체학술대회 (KCS), pp.103 - 104, 2002-02

83
Loosely coupled memory-based decoding architecture for low density parity check codes

Kang, S.-H.; Park, In-Cheol, IEEE 2005 Custom Integrated Circuits Conference, v.2005, pp.703 - 706, 2005-09-18

84
Loosely Coupled Memory-Based Decoding Architecture for Low Density Parity Check Codes

Kang , SH; Park, In-Cheol, The 13th Kirean Conference on Simiconductors, 2006-02

85
Loosely Coupled Memory-Based Decoding Architecture for Low Desity Parity Check Codes

Kang , SH; Park, In-Cheol, IT-SoC conference, 2005

86
Low Cost Floating-Point Unit Design for Audio Appplications

Lee, S.-W.; Park, In-Cheol, 2002 IEEE International Symposium on Circuits and Systems, v.1, pp.869 - 872, IEEE, 2002-05-26

87
Low-complex BPSK demodulation using absolute comparison

Lee, Y.; Lim, G.; Park, In-Cheol, 2010 IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2010, pp.1080 - 1083, IEEE, 2010-12-12

88
Low-Power Hybrid Structure of Digital Matched Filters for Direct Sequence Spread Spectrum Systems

Lee, Sung-Won; Park, In-Cheol, 2003 SoC Design Conference(SDC), pp.169 - 172, 2003-11-05

89
Low-power log-map turbo decoding based on reduced metric memory access

Lee, D.-S.; Park, In-Cheol, IEEE International Symposium on Circuits and Systems 2005, ISCAS 2005, pp.3167 - 3170, IEEE, 2005-05-23

90
Mask ROM합성기의 구현

김진석; 박인철, SoC Design Conference, pp.812 - 817, 2001

91
Memory-Based Low Density Parity Check Code Decoder Architecture Using Loosely Coupled Two Data Flows

Kang , SH; Park, In-Cheol, 2003 SoC Design Conference(SDC), pp.860 - 863, 2003-11-05

92
Memory-less bit-plane coder architecture for JPEG2000 with concurrent column-stripe coding

Rhu, M.; Park, In-Cheol, 2009 IEEE International Conference on Image Processing, ICIP 2009, pp.2673 - 2676, 2009-11-07

93
MIMO-OFDM 시스템을 위한 V-BLAST의 설계 및 구현

최용우; 박인철, 대한전자공학회 하계학술대회, pp.415 - 418, 대한전자공학회, 2004

94
Multi-Project Chip Activities in Korea-IDEC Perspective

Kyung, Chong-Min; Park, In-Cheol; Song, H.J., ASP-DAC'97, 1997-07

95
Multiplier-less and table-less linear approximation for square and square-root

Park, In-Cheol; Kim, T.-H., 2009 IEEE International Conference on Computer Design, ICCD 2009, pp.378 - 383, 2009-10-04

96
Multiplier-less IIR filter synthesis algorithms to trade-off the delay and the number of adders

Kang, H.-J.; Park, In-Cheol, IEEE International Symposium on Circuits and Systems (ISCAS 2001), v.2, pp.693 - 696, IEEE, 2001-05-06

97
Near Optimal Scheduling in Automatic Data Path Synthesis

Park, In-Cheol; Kyung, Chong-Min, Joint Technical Conference on Circuits/Systems, Computers and Communications, pp.305 - 310, 대한전자공학회, 1990

98
Overlapped Scheduling for Folded LDPC Decoding Based on Matrix Permutation

Park, In-Cheol; Kang, SH, SoC Conference, pp.62 - 67, 2005-03-21

99
Parallel 방식을 이용한 2K/4K/8K-point FFT processor

문상철; 박인철, SOC Design Conference, 2002-10

100
Point-to-Point Protocol Having Minimum Channels for On-Chip Interconnect

송진욱; 이재봉; 박인철, 대한전자공학회 하계종합학술대회, 대한전자공학회, 2010-06-17

101
Power Operation Accelerator to speed up lighting in 3D Graphics

권영수; 박인철; 경종민, 대한전자공학회 추계학술대회, v.21, no.2, pp.1129 - 1132, 대한전자공학회, 1998

102
Programmable Turbo Decoder Supporting Multiple Third-Generation Wireless Standards

박인철; Shin, MC, SOC Design Conference, 2002-10

103
Real-time Ethernet Network Optimized for Communication between Automotive Electronics

유인재; 송진욱; 김봉진; 공병용; 윤동준; 박인철, 대한전자공학회 추계학술대회, 대한전자공학회, 2011-11-26

104
Robust and Hardware-Efficient Least Square Channel Estimator

김은찬; 박인철, 대한전자공학회 2009년 하계종합학술대회 , pp.148 - 149, 대한전자공학회, 2009-07

105
SAT-based unbounded symbolic model checking

Kang, H.-J.; Park, In-Cheol, Proceedings of the 40th Design Automation Conference, pp.840 - 843, 2003-06-02

106
Single cycle access cache for the misaligned data and instruction prefetch

Yim, JS; Lee, HC; Kim, TH; Park, BI; Park CJ; Park, In-Cheol, 1997 Asia and South Pacific Design Automation Conference, ASP-DAC, pp.677 - 678, 1997-01-28

107
Small-area and low-energy K-best MIMO detector using relaxed tree expansion and early forwarding

Kim, T.-H.; Park, In-Cheol, 16th ACM/IEEE International Symposium on Low-Power Electronics and Design, ISLPED'10, pp.231 - 236, ACM/IEEE, 2010-08-18

108
Synchronous CMOS SRAM Compiler의 구현

강세현; 박인철, 대한전자공학회 하계종합학술대회, pp.381 - 384, 대한전자공학회, 2001-06-29

109
Synthesizable ARM9 호환 CPU의 설계

서보익; 배영돈; 박인철, 대한전자공학회 추계종합학술대회, v.32, no.2, pp.200 - 203, 대한전자공학회, 2000-11-25

110
Timed Compiled-Code Functional Simulation of Embedded Software for Performance Analysis of SoC Designs

Lee , JY; Park, In-Cheol, 휴먼테크, 2002

111
Timed compiled-code simulation of embedded software for performance analysis of SOC design

Lee, J.-Y.; Park, In-Cheol, 39th Annual Design Automation Conference, DAC'02, pp.293 - 298, 2002-06-10

112
Twiddle factor transformation for pipelined FFT processing

Park, In-Cheol; Son, W.; Kim, J.-H., 2007 IEEE International Conference on Computer Design, ICCD 2007, pp.1 - 6, 2007-10-07

113
Two-step aprroach for coarse time synchronization and frequency offset estimation for IEEE 802.16D systems

Kim, T.-H.; Park, In-Cheol, 2007 IEEE Workshop on Signal Processing Systems, SiPS 2007, pp.193 - 198, 2007-10-17

114
Unified Implementation of Discrete Cosine Transform for Supporting Multiple Video Coding Standards

Pyo , JP; Park, In-Cheol, SoC Conference, pp.73 - 78, 2005-03-21

115
Verification methodology of compatible microprocessors

Yim, JS; Park, CJ; Yang, WS; Oh, HS; Lee, HC; Choi, H; Kim, TH; et al, Proceedings of the 1997 Asia and South Pacific Design Automation Conference, ASP-DAC, pp.173 - 180, 1997-01-28

116
Vertical Partitioing of Row-Based Circuits with Minimal Net-Crossings

Park, In-Cheol; Kyung, Chong-Min, IEEE International Sympoisum on Circuits and Systems, 1991-06

117
Virtual Chip : Making Funcional Models Work on Real Taget Systems

Kim, N; Choi, H; Lee, S; Lee, S.W.; Park, In-Cheol; Kyung, Chong-Min, Proceedings of the 1998 35th Design Automation Conference, pp.170 - 173, 1998-06-15

118
W-CDMA 터보디코딩을 위한 효율적인 Stopping Criteria

이동수; 박인철, 대한전자공학회 추계학술대회, pp.265 - 268, 대한전자공학회, 2003-11

119
기가비트 이더넷 스위치에서 빠른 MAC 주소 테이블의 검색 방법

이승왕; 박인철, 대한전자공학회 추계종합학술대회, v.21, no.2, pp.799 - 802, 대한전자공학회, 1998

120
내장형 신호처리를 위한 응용분야 전용 프로세서의 설계

이성원; 최훈; 박인철, 대한전자공학회 추계종합학술대회 논문집 제22권 제2호, pp.228 - 231, 대한전자공학회, 1999

121
디지털 직접 대역 확산 무선 송수신 IP의 설계

박성일; 배영돈; 박인철, CAD및 VLSI 설계연구회 학술발표대회, pp.31 - 35, 대한전자공학회, 2000-05

122
멀티쓰레디드 프로세서를 위한 고성능 분기예측기 구조

배영돈; 박인철, 2005년도 SOC 학술대회, pp.145 - 148, 대한전자공학회, 2005-03-21

123
무선 LAN용 네트웍 프로세서의 설계

김선영; 박성일; 박인철, 대한전자공학회 추계종합학술대회, pp.184 - 187, 대한전자공학회, 2000-11-25

124
부동소수점 덧셈 연산기의 저전력화 구조

김윤환; 박인철, 대한전자공학회 추계종합학술대회, pp.1089 - 1092, 대한전자공학회, 1998

Discover

Type

. next

Open Access

Date issued

. next

Subject

. next

rss_1.0 rss_2.0 atom_1.0