Browse "School of Electrical Engineering(전기및전자공학부)" byAuthorYun, Byeonghun

Showing results 1 to 6 of 6

1
A 250-GHz 12.6-dB Gain and 3.8-dBm P-sat Power Amplifier in 65-nm CMOS Adopting Dual-Shunt Elements Based G(max)-Core

Yun, Byeonghun; Park, Dae-Woong; Choi, Won-Jong; Usman Mahmood, Hafiz; Lee, Sang-Gugresearcher, IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, v.31, no.3, pp.292 - 295, 2021-03

2
A 293/440 GHz Push-Push Double Feedback Oscillators with 5.0/−3.9 dBm Output Power and 2.9/0.6 % DC-to-RF Efficiency in 65 nm CMOS

Utomo, Dzuhri Radityo; Park, Dae-Woong; Yun, Byeonghun; Lee, Sang-Gugresearcher, 2020 IEEE Symposium on VLSI Circuits, VLSI Circuits 2020, IEEE, 2020-06-18

3
A 915 MHz, 499 μW, –99 dBm, and 100 kbps BFSK Direct Conversion Receiver

Kim, Keun-Mok; Jeong, Eui-Rim; Choi, Kyung-Sik; Kim, Subin; Yun, Byeonghun; Jung, Hyunki; Oh, Wonkab; et al, ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference (ESSCIRC), pp.209 - 212, IEEE, 2019-09-25

4
A D-Band High-Gain and Low-Power LNA in 65-nm CMOS by Adopting Simultaneous Noise- and Input-Matched G(max)-Core

Yun, Byeonghun; Park, Dae-Woong; Mahmood, Hafiz Usman; Kim, Doyoon; Lee, Sang-Gugresearcher, IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, v.69, no.5, pp.2519 - 2530, 2021-05

5
A D-Band Power Amplifier in 65-nm CMOS by Adopting Simultaneous Output Power-and Gain-Matched G(max)-Core

Park, Dae-Woong; Utomo, Dzuhri Radityo; Yun, Byeonghun; Mahmood, Hafiz Usman; Lee, Sang-Gugresearcher, IEEE ACCESS, v.9, pp.99039 - 99049, 2021

6
(A) 2.4GHz, 40$\mu$W, 4dB NF and 20dB gain ULP LNA adopting current reuse technique for implementing quadruple Gm boosting = 쿼드러플 트랜스컨덕턴스 부스팅 기법을 이용한 초저전력 저잡음 증폭기link

Yun, Byeonghun; Lee, Sang-Gug; et al, 한국과학기술원, 2019

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