Showing results 1 to 4 of 4
An Area-Efficient Iterative Modified-Booth Multiplier Based on Self-Timed Clocking Park, In-Cheol; Shin, MC; Kang , SH, IDEC Conference 2002 Summer, pp.119 - 122, 2002 |
Loosely Coupled Memory-Based Decoding Architecture for Low Density Parity Check Codes Kang , SH; Park, In-Cheol, The 13th Kirean Conference on Simiconductors, 2006-02 |
Loosely Coupled Memory-Based Decoding Architecture for Low Desity Parity Check Codes Kang , SH; Park, In-Cheol, IT-SoC conference, 2005 |
Memory-Based Low Density Parity Check Code Decoder Architecture Using Loosely Coupled Two Data Flows Kang , SH; Park, In-Cheol, 2003 SoC Design Conference(SDC), pp.860 - 863, 2003-11-05 |
Discover