Browse "School of Electrical Engineering(전기및전자공학부)" byAuthorKaeli, David

Showing results 1 to 6 of 6

Griffin: Hardware-Software Support for Efficient Page Migration in Multi-GPU Systems

Baruah, Trinayan; Sun, Yifan; Dincer, Ali Tolga; Mojumder, Saiful A.; Abellan, Jose L.; Ukidave, Yash; Joshi, Ajay; et al, 26th IEEE International Symposium on High Performance Computer Architecture (HPCA), pp.596 - 609, IEEE, 2020-02

MGPUSim: Enabling multi-GPU performance modeling and optimization

Sun, Yifan; Baruah, Trinayan; Mojumder, Saiful A.; Dong, Shi; Gong, Xiang; Treadway, Shane; Bao, Yuhui; et al, 46th International Symposium on Computer Architecture, ISCA 2019, pp.197 - 209, Institute of Electrical and Electronics Engineers Inc., 2019-06-24

Profiling DNN Workloads on a Volta-based DGX-1 System

Saiful A. Mojumder; Marcia S Louis; Yifan Sun; Amir Kavyan Ziabari; Jose L. Abellan; Kim, John Dongjunresearcher; Kaeli, David; et al, 2018 IEEE International Symposium on Workload Characterization(IISWC), pp.122 - 133, IEEE, 2018-10-02

Trident: A Hybrid Correlation-Collision GPU Cache Timing Attack for AES Key Recovery

Ahn, Jaeguk; Jin, Cheolgyu; Kim, Jiho; Rhu, Minsooresearcher; Fei, Yunsi; Kaeli, David; Kim, John, 27th IEEE International Symposium on High-Performance Computer Architecture (HPCA), pp.332 - 344, IEEE COMPUTER SOC, 2021-03

UMH: A Hardware-Based Unified Memory Hierarchy for Systems with Multiple Discrete GPUs

Ziabari, Amir Kavyan; Sun, Yifan; Ma, Yenai; Schaa, Dana; Abellan, Jose L.; Ubal, Rafael; Kim, Johnresearcher; et al, ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION, v.13, no.4, 2016-12

Valkyrie: Leveraging inter-TLB locality to enhance GPU performance

Baruah, Trinayan; Sun, Yifan; Mojumder, Saiful A; Abellán, José L; Ukidave, Yash; Joshi, Ajay; Rubin, Norman; et al, 2020 ACM International Conference on Parallel Architectures and Compilation Techniques, PACT 2020, pp.456 - 466, Institute of Electrical and Electronics Engineers Inc., 2020-10-06



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