Browse "School of Electrical Engineering(전기및전자공학부)" byAuthorFan, Jun

Showing results 1 to 6 of 6

1
Algorithm for Extracting Parameters of the Coupling Capacitance Hysteresis Cycle for TSV Transient Modeling and Robustness Analysis

Piersanti, Stefano; Pellegrino, Enza; de Paulis, Francesco; Orlandi, Antonio; Jung, Daniel Hyunsuk; Kim, Dong-Hyun; Kim, Jounghoresearcher; et al, IEEE TRANSACTIONS ON ELECTROMAGNETIC COMPATIBILITY, v.59, no.4, pp.1329 - 1338, 2017-08

2
Design of On-Chip Linear Voltage Regulator ModuleAnd Measurement of Power Distribution NetworkNoise Fluctuation at High-Speed Output Buffer

Lee, Man Ho; Kim, Hee Gon; Kim, Suk Jin; Kim, Joung Ho; Cho, Jong Hyun; Yoon, Chang Wook; Achkir, Brice; et al, 24rd Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS), 24rd Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS), 2015-10-25

3
Equivalent Circuit Model for Power Bus Design in Multi-Layer PCBs With Via Arrays

Kim, Jingook; Shringarpure, Ketan; Fan, Jun; Kim, Jounghoresearcher; Drewniak, James L., IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, v.21, no.2, pp.62 - 64, 2011-02

4
Equivalent Circuit Modeling of Dielectric Hysteresis Loops in Through Silicon Vias

Piersanti, Stefano; De Paulis, Francesco; Orlandi, Antonio; Kim, Dong-Hyun; Kim, Jounghoresearcher; Fan, Jun, IEEE TRANSACTIONS ON ELECTROMAGNETIC COMPATIBILITY, v.57, no.6, pp.1510 - 1516, 2015-12

5
Guest Editorial: Introduction to the Special Issue on EMC for Wireless Power Transfer and Power Electronics

Fan, Jun; Carvalho, Nuno Borges; Kim, Jounghoresearcher, IEEE TRANSACTIONS ON ELECTROMAGNETIC COMPATIBILITY, v.61, no.6, pp.1902 - 1903, 2019-12

6
Inductance Calculations for Plane-Pair Area Fills With Vias in a Power Distribution Network Using a Cavity Model and Partial Inductances

Kim, Jingook; Fan, Jun; Ruehli, Albert E.; Kim, Jounghoresearcher; Drewniak, James L., IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, v.59, no.8, pp.1909 - 1924, 2011-08

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