Showing results 1 to 3 of 3
A 40nm CMOS 12b 200MS/s Single-amplifier Dual-residue Pipelined-SAR ADC Seo, Min-Jae; Kim, Ye Dam; Chung, Jae-Hyun; Ryu, Seung-Tak, 39th Symposium on VLSI Technology / 33rd Symposium on VLSI Circuits, pp.C72 - C73, IEEE, 2019-06-11 |
A 4th-order CT I-DSM with Digital Noise Coupling and Input Pre-conversion Method for Initialization Kim, Ye-Dam; Chung, Jae-Hyun; Lozada, Kent Edrian; Chang, Dong-Jin; Ryu, Seung-Tak, 17th IEEE Asian Solid-State Circuits Conference (A-SSCC) - Integrated Circuits and Systems for the Connection of Intelligent Things, IEEE, 2021-11-07 |
CMOS Image Sensors with Delta Readout Scheme Kim, Hyeon-June; Hwang, Sun-Il; Chung, Jae-Hyun; Ryu, Seung-Tak, International SoC Design Conference, IEEE, 2017-11-07 |
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