Browse "School of Electrical Engineering(전기및전자공학부)" byAuthorC.M.Kyung

Showing results 1 to 42 of 42

1
A Design Rule Checker Based on Bit-Mapping

K.S.Eo; K.T.Kim; C.M.Kyungresearcher, 전기학회논문지, v.22, no.2, pp.36 - 43, 1985-03

2
A Graphics Accelerator for Hidden Surface Removal and Color Shading

K.I.Bang; S.O.Bae; C.M.Kyungresearcher, 전자공학회논문지A, v.28, no.5, pp.60 - 68, 1991-05

3
A Hybrid Shadow Testing Scheme During Ray Tracing

K.S.Eo; C.M.Kyungresearcher, 전자공학회논문지, v.26, no.3, pp.402 - 411, 1989-03

4
A One-Pass Standard Cell Placement Algorithm Using Multi-Stage Graph Model

H.G.Cho; C.M.Kyungresearcher, 전기학회논문지, v.24, no.6, pp.1074 - 1079, 1987-11

5
A Power and Ground Router Using Simulated Annealing

S.G.Choi; C.M.Kyungresearcher, KITE JOURNAL OF ELECTRONICS ENGINEERING, v.1, no.1, pp.57 - 64, 1990-06

6
A Scanline Rendering Scheme for Animation

J.H.Kim; C.M.Kyungresearcher, 정보과학회지, v.20, no.8, pp.1093 - 1102, 1993-08

7
A Study on the Automatic Placement System for Standard Cell

G.S.Kang; C.M.Kyungresearcher; S.B.Park, 전기학회논문지, v.23, no.4, pp.557 - 564, 1986-07

8
A Two-Dimensional Analysis of the Low Level Currents in Buried-Channel MOS Transistors

C.M.Kyungresearcher; C.K.Kim, 전기학회논문지, v.15, pp.35 - 38, 1978-12

9
An Adaptive Finite Element Method for Semicondutor Device Analysis

K.Choi; C.M.Kyungresearcher; M.K.Han; S.Y.Hahn, 전기학회논문지, v.37, no.4, 1988-04

10
An Algorithm for Global Placement of Circuit Modules

C.M.Kyungresearcher, KITE JOURNAL OF ELECTRONICS ENGINEERING, v.1, no.1, pp.66 - 71, 1990-06

11
An Automated Design of CMOS Standard Cells

H.H.Kim; C.M.Kyungresearcher, 전기학회논문지, v.23, no.6, pp.988 - 994, 1986-11

12
An O(n3 log n)-Heuristic for Microcode Bit Optimization

S.K.Hong; I.C.Parkresearcher; C.M.Kyungresearcher, KITE JOURNAL OF ELECTRONICS ENGINEERING, v.1, no.2, pp.84 - 89, 1990-12

13
Analytical Threshold Voltage Model of Ion-Implanted MOSFET

H.S.Kim; J.H.Jin; C.M.Kyungresearcher, 전기학회논문지, v.22, no.6, pp.590 - 594, 1985-11

14
Automated Layout of PLA Using CIF

T.S.Jung; Y.Y.Yang; C.M.Kyungresearcher, 전기학회논문지, v.22, no.1, pp.14 - 21, 1985-01

15
Automatic Layout of High Density PLA

J.H.Lee; C.M.Kyungresearcher, 전기학회논문지, v.6, pp.545 - 550, 1985-11

16
Characterization of Two-Dimensional Impurity Profile in Silicon

Y.Y.Yang; C.M.Kyungresearcher, 전자공학회지, v.23, no.6, pp.189 - 195, 1986-11

17
Charge-coupled analog-to-Digital Converter

C.M.Kyungresearcher; C.K.Kim, 전자공학회지, v.18, no.5, pp.1 - 9, 1981-10

18
Circuit Extraction from MOS/LSI Mask Layout

S.S.Kim; C.M.Kyungresearcher, 전자공학회지, v.23, no.6, pp.981 - 987, 1986-11

19
Circuit Placement in Arbitrarily-Shaped Region Using Self-Organization

S.S.Kim; C.M.Kyungresearcher, 전자공학회지, v.26, no.7, pp.140 - 145, 1989-07

20
Collision Detection and Response Calculation for 3-D Computer Animation

H.J.Kim; C.M.Kyungresearcher, 전자공학회지, v.30, no.3, pp.300 - 308, 1993-03

21
Comparison of Numerical Methods for Obtaining 2-D Impurity Profile in Semiconductor

Y.Y.Yang; C.M.Kyungresearcher; H.C.Oh, 전기학회논문지, v.22, no.3, pp.95 - 102, 1985-05

22
Design and Applications of the Graphics Interface on Personal Computer

J.H.Kim; C.M.Kyungresearcher, 전자공학회논문지, v.26, no.1, pp.113 - 121, 1989-01

23
Design and Display of Solids Using CSG and Boundary Representation

K.H.Park; C.M.Kyungresearcher, 전자공학회논문지, v.27, no.2, pp.151 - 157, 1990-02

24
Design and Implementation or Hangul Graphic Board to Speed Up the Generation of High Resolution Fonts Used in Electonic Publishing System

G.C.Hwang; C.M.Kyungresearcher, 전자공학회논문지, v.27, no.5, pp.802 - 807, 1990-05

25
Design of Graphics Accelerator for Fast Phong Shading

G.K.Song; S.O.Bae; C.M.Kyungresearcher, 전자공학회지, v.28, no.7, pp.578 - 585, 1991-07

26
Development of a Hardware Accelerator for Generation of Korean Character

T.H.Lee; G.C.Hwang; I.C.Park; Y.T.Lee; J.H.Bae; C.M.Kyungresearcher, 전자공학회논문지 B, v.28, no.9, pp.712 - 718, 1991-09

27
Effect of Capacitance Error on the A/D Conversion Accuracy

Y.T.Lee; C.K.Kim; C.M.Kyungresearcher, 전기학회논문지, v.22, no.5, pp.476 - 480, 1985-09

28
Experimental Analysis and Suppression Method of CMOS Latchup Phenomena

Y.H.Koh; C.K.Kim; C.M.Kyungresearcher, 전기학회논문지, v.22, no.5, pp.469 - 475, 1985-09

29
Fabrication of 32x32 Flat Panel Display Using Liquid Crystal

J.G.Kim; C.K.Kim; C.M.Kyungresearcher, 전기학회논문지, v.23, no.1, pp.46 - 49, 1986-01

30
Fast Ray Tracing Algorithm for Moving Object

J.H.Kim; C.M.Kyungresearcher, 전자공학회논문지, v.28, no.6, pp.94 - 101, 1991-06

31
Functional-Level Design and Simulation of a Graphics Processor

S.O.Bae; H.C.Lee; C.M.Kyungresearcher, 전자공학회논문지, v.25, no.10, pp.112 - 122, 1988-10

32
Graphic Workstation

K.S.Eo; C.M.Kyungresearcher, 정보과학회지, v.6, no.4, pp.36 - 42, 1988-08

33
HALO : An Efficient Global Placement Strategy for Standard Cells

Y.Y.Yang; C.M.Kyungresearcher, 전자공학회논문지, v.26, no.10, pp.137 - 144, 1989-10

34
Layer Assignment of Functional Chip Blocks for 3-D Hybrid IC Planning

P.H.Lee; C.M.Kyungresearcher, 전자공학회지, v.24, no.6, pp.1068 - 1073, 1987-11

35
MultiRing ; An Efficient Hardware Accelerator for Design Rule Checking

K.S.Eo; C.M.Kyungresearcher, 전자공학회 논문지, v.24, no.6, pp.110 - 119, 1987-11

36
Placement and Global Routing of Functional Blocks

H.K.Choi; C.M.Kyungresearcher, 전기학회지, v.24, no.1, pp.140 - 148, 1987-01

37
Two-Dimensional Simulation of MOS Transistors Using Numerical Method

T.S.Jung; C.M.Kyungresearcher, 전기학회지, v.22, no.5, pp.512 - 520, 1985-09

38
Via Minimization Using Neural Networks

S.S.Kim; C.M.Kyungresearcher, 전자공학회논문지, v.27, no.7, pp.129 - 136, 1990-07

39
대칭형 FPGA의 새로운 배선구조와 배선 알고리즘

N.W.Eum; H.J.Cho; I.H.Park; C.M.Kyungresearcher, 전자공학회논문지, v.33, no.4, pp.142 - 151, 1996-04

40
시뮬레이티드 어닐링을 이용한 마크로 블록의 배치

I.C.Parkresearcher; C.M.Kyungresearcher, 전자공학회지, v.26, no.2, pp.286 - 293, 1989-02

41
한글 외곽선 글자체 생성 가속기의 설계 및 구현

J.H.Bae; G.C.Hwang; Y.T.Lee; I.C.Parkresearcher; C.M.Kyungresearcher, 전자공학회논문지 A, v.29, no.2, pp.100 - 106, 1992-02

42
효율적인 데이터 저장을 기초로한 광선 추적의 가속화 방안

H.K.Choi; C.M.Kyungresearcher, 전자공학회논문지, v.26, no.8, pp.143 - 154, 1989-08

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