Browse "School of Electrical Engineering(전기및전자공학부)" by Author Bang, Jooeun
Showing results 1 to 5 of 5
| A -31dBc integrated-phase-noise 29GHz fractional-N frequency synthesizer supporting multiple frequency bands for backward-compatible 5G using a frequency doubler and injection-locked frequency multipliers Yoon, Heein; Kim, Juyeop; Park, Suneui; Lim, Younghyun; Lee, Yongsun; Bang, Jooeun; Lim, Kyoohyun; et al, 65th IEEE International Solid-State Circuits Conference, ISSCC 2018, pp.366 - 368, Institute of Electrical and Electronics Engineers Inc., 2018-02-13 |
| A 0.0084-mV-FOM, Fast-Transient and Low-Power External-Clock-Less Digital LDO Using a Gear-Shifting Comparator for the Wide-Range Adaptive Sampling Frequency Bang, Jooeun; Choi, Seojin; Yoo, Seyeon; Lee, Jeonghyun; Kim, Juyeop; Choi, Jaehyouk, ESSCIRC 2021 - IEEE 47th European Solid State Circuits Conference (ESSCIRC), pp.351 - 354, IEEE, 2021-09-13 |
| A 170MHz-Lock-In-Range and-253dB-FoM(jitter), 12-to-14.5GHz Subsampling PLL with a 150 mu W Frequency-Disturbance-Correcting Loop Using a Low-Power Unevenly Spaced Edge Generator Lim, Younghyun; Kim, Juyeop; Jo, Yongwoo; Bang, Jooeun; Yoo, Seyeon; Park, Hangi; Yoon, Heein; et al, IEEE International Solid-State Circuits Conference (ISSCC), pp.280 - 282, IEEE, 2020-02-19 |
| A Fast-Transient and High-Accuracy, Adaptive-Sampling Digital LDO Using a Single VCO-Based Edge-Racing Time Quantizer Lee, Jeonghyun; Bang, Jooeun; Lim, Younghyun; Yoo, Seyeon; Lee, Yongsun; Seong, Taeho; Choi, Jaehyouk, IEEE Solid-State Circuits Letters, v.2, no.12, pp.305 - 308, 2019-12 |
| A Wide-Lock-In-Range and Low-Jitter 12-14.5 GHz SSPLL Using a Low-Power Frequency-Disturbance-Detecting and Correcting Loop Lim, Younghyun; Kim, Juyeop; Jo, Yongwoo; Bang, Jooeun; Choi, Jaehyouk, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.57, no.2, pp.480 - 491, 2022-02 |
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