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High-frequency on-chip inductance model Sim, SP; Lee, Kwyro; Yang, CY, IEEE ELECTRON DEVICE LETTERS, v.23, no.12, pp.740 - 742, 2002-12 |
Loop-based inductance extraction and modeling for multiconductor on-chip interconnects Yu, S; Petranovic, DM; Krishnan, S; Lee, Kwyro; Yang, CY, IEEE TRANSACTIONS ON ELECTRON DEVICES, v.53, pp.135 - 145, 2006-01 |
Unified model for deep sub-micron on-chip interconnects including non-orthogonal architecture = 비직교형 아키텍쳐를 포함하는 깊은 서브 마이크론 On-chip interconnects 를 위한 통합 모델link Sim, Sang-Pil; 심상필; et al, 한국과학기술원, 2003 |
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