| 1 | A 1 mJ/Frame Unified Media Application Processor With Dynamic Analog-Digital Mode Reconfiguration for Embedded 3D-Media Contents Processing Kim, Hyo-Eun; Park, Jun-Seok; Yoon, Jae-Sung; Kim, Seok-Hoon; Kim, Lee-Sup, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.48, pp.1970 - 1985, 2013-08 |
| 2 | A 116 fps/74 mW Heterogeneous 3D-Media Processor for 3-D Display Applications Kim, Seok-Hoon; Kim, Hong-Yun; Kim, Young-Jun; Chung, Kyu-Sik; Kim, Dong-Hyun; Kim, Lee-Sup, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.45, pp.652 - 667, 2010-03 |
| 3 | A Floating-Point Unit for 4D Vector Inner Product with Reduced Latency Kim, D; Kim, Lee-Sup; Kim, LS, IEEE TRANSACTIONS ON COMPUTERS, v.58, pp.890 - 901, 2009-07 |
| 4 | A Low-Power Multimedia SoC with Fully Programmable 3D Graphics for Mobile Devices Woo, Jeong-Ho; Kim, Hyejung; Yoo, Hoi-Jun; Sohn, JH, IEEE COMPUTER GRAPHICS AND APPLICATIONS, v.29, pp.82 - 90, 2009-09 |
| 5 | A single-pass antialiased rasterization processor Lee, JA; Kim, Lee-Sup, IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, v.E84A, no.12, pp.3152 - 3161, 2001-12 |
| 6 | (A) 36fps SXGA 3D display processor with a programmable 3D graphics rendering engine = 프로그래머블한 3차원 그래픽 렌더링 엔진을 포함한 36fps SXGA 3차원 디스플레이 프로세서link Kim, Seok-Hoon; 김석훈; et al, 한국과학기술원, 2007 |
| 7 | (A) mobile 3D display processor with a bandwidth-efficient subdivider = 서브디바이더와 병합된 모바일 3D 디스플레이 프로세서link Kim, Seok-Hoon; 김석훈; et al, 한국과학기술원, 2010 |
| 8 | Adaptive tessellation of PN triangles using minimum-artifact edge linking Choi, YS; Chung, KS; Kim, Lee-Sup, IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, v.E87A, pp.2821 - 2828, 2004-10 |
| 9 | An efficient fragment processing technique in A-buffer implementation Kim, D; Kim, Lee-Sup, IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, v.E87A, pp.258 - 269, 2004-01 |
| 10 | An efficient memory address converter for SoC-based 3D graphics system Kim, JY; Kim, Lee-Sup, JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, v.14, pp.861 - 875, 2005-08 |
| 11 | (An) efficient memory interface design based on access pattern analysis for SoC-based 3D graphics accelerator = SoC 기반의 3차원 그래픽스 가속기의 억세스 패턴 분석에 기반한 효율적인 메모리 억세스 방법에 관한 연구link Kim, Joung-Youn; 김정연; et al, 한국과학기술원, 2005 |
| 12 | Bandwidth-efficient mobile geometry processor with tessellation functionality and power-saving techniques = 효율적 메모리 대역폭 사용과 전력소모 감소를 위한 테셀레이션 가능 모바일 기하 프로세서에 관한 연구link Chung, Kyu-Sik; 정규식; et al, 한국과학기술원, 2009 |
| 13 | CEngine : an implementation of two-stage clipping engine for embedded system = 내장형 시스템을 위한 이단 클리핑 엔진의 구현link Bae, Jae-Wan; 배재완; et al, 한국과학기술원, 2005 |
| 14 | Development of a-3-D graphics rendering engine with lighting acceleration for handheld multimedia systems Nam, BG; Lee, MW; Yoo, Hoi-Jun, IEEE TRANSACTIONS ON CONSUMER ELECTRONICS, v.51, pp.1020 - 1027, 2005-08 |
| 15 | Efficient edge function based anisotropic texture filtering Shin, HC; Lee, JA; Kim, Lee-Sup, IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, v.E87A, pp.964 - 970, 2004-04 |
| 16 | MRTP: Mobile Ray Tracing Processor With Reconfigurable Stream Multi-Processors for High Datapath Utilization Kim, Hong-Yun; Kim, Young-Jun; Kim, Lee-Sup, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.47, no.2, pp.518 - 535, 2012-02 |
| 17 | Tiling-based polygon rasterizer with dynamic stamp positioning = 동적인 스탬프 위치를 이용한 타일기반 폴리곤 래스터라이저link Chun, Kang-Hyup; 천강협; et al, 한국과학기술원, 2003 |
