Showing results 1 to 4 of 4
670 ps, 64 bit dynamic low-power adder design Woo, Ramchan; Lee, Se-Joong; Yoo, Hoi-Jun, Proceedings of the IEEE 2000 Internaitonal Symposium on Circuits and Systems, v.1, 2000-05-28 |
7.1GB/sec Bandwidth 3D Rendering Engine Using the EML Technology Yoo, Hoi-Jun; Park, Yong-Ha; Woo, Ramchan; Han, Seon-Ho; Kim, Jung-Su; Lee, Se-Joong; Kook, Jeong-Hoon; et al, International Conference on VLSI and CAD, pp.277 - 280, 1999 |
A 50Mvertices/s graphics processor with fixed-point programmable vertex shader for mobile applications Sohn, Ju-Ho; Woo, Jeong-Ho; Lee, Min-Wuk; Kim, Hye-Jung; Woo, Ramchan; Yoo, Hoi-Jun, 2005 IEEE International Solid-State Circuits Conference, ISSCC, pp.192 - 193, IEEE, 2005-02-06 |
A 670ps, 64bit dynamic low-power adder design Yoo, Hoi-Jun; Woo, Ramchan; Lee, Se-Joong, IEEE International Symposium on Circuits and Systems, pp.I-28 - I-31, IEEE, 2000-05 |
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