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A unified RLC model for high-speed on-chip interconnects Sim, SP; Krishnan, S; Petranovic, DM; Arora, ND; Lee, Kwyro; Yang, CY, IEEE TRANSACTIONS ON ELECTRON DEVICES, v.50, pp.1501 - 1510, 2003-06 |
Loop-based inductance extraction and modeling for multiconductor on-chip interconnects Yu, S; Petranovic, DM; Krishnan, S; Lee, Kwyro; Yang, CY, IEEE TRANSACTIONS ON ELECTRON DEVICES, v.53, pp.135 - 145, 2006-01 |
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