A method for estimating EMI reduction and its application on a Fractional-N PLL based SSCG design = EMI감소를 평가하는 방법 및 이를 응용하는 Fractional-N PLL기반의 SSCG설계에 대한 연구

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An accurate estimation of Electromagnetic interference (EMI) reduction is realized by a theoretical analysis. The proposed analysis allows to estimating EMI reduction in a straightforward manner from the predetermined modulation index and noise injection. The degradation in EMI reduction is directly correlated with the amount of injected noise in a SSCG. A statistic analysis of the state-of-the-art Fractional-N Phase Locked Loop (PLL) based SSCGs is presented to prove the validity of the proposed analysis. The estimation is matched to measurement results taken from the state-of-the-art Fractional-N PLL based SSCGs. Furthermore, a design example of N-fractional Phase Locked Loop (PLL) based SSCG is presented to prove the validity of the proposed analysis. The estimation of EMI reduction in the designed N-fractional PLL based SSCG is finalized by the loop bandwidth trade-off of noise injection. The measured EMI reduction of a designed N-fractional PLL based SSCG is matched to the proposed estimation value. For further study on the bandwidth trade-off issue, a new architecture of N-fractional PLL based SSCG without bandwidth trade-off is proposed.
Advisors
Lee, Sang-Gugresearcher이상국
Description
한국과학기술원 : 정보통신공학과,
Publisher
한국과학기술원
Issue Date
2013
Identifier
566047/325007  / 020055914
Language
eng
Description

학위논문(박사) - 한국과학기술원 : 정보통신공학과, 2013.8, [ vi, 64 p. ]

Keywords

EMI reduction; 스프레드 스펙트럼 클록 발생기; 삼각 변조 프로필; 주파수 변조; EMI 감소; Fractional-N 주파수기; frequency modulation; triangular modulation profile; spread spectrum clock generator; Fractional-N PLL; CMOS

URI
http://hdl.handle.net/10203/197773
Link
http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=566047&flag=dissertation
Appears in Collection
ICE-Theses_Ph.D.(박사논문)
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