High-resolution ADC-assisted time-to-digital converter

Abstract

In this paper, an energy-efficient ADC-assisted time-to-digital converter(TDC) is presented. The proposed TDC operates in two steps, first in time-domain by using a delay-line TDC and second in voltage-domain by using a SAR ADC. The time residue of the first stage is converted to voltage using a switch-based time-to-voltage converter(T2V) which eliminates the need for a large output impedance current source that is necessary in conventional T2V. To improve the linearity of the proposed T2V, a pseudo-differential time-domain signaling method is presented in order to remove the even harmonics. A prototype chip fabricated in 65nm CMOS achieves 630fs of time resolution at 120Msps while consuming 3.7mW from a 1.2V supply. The figure of merit is 244fJ/conversion-step, the best among recently published high-speed TDCs.